MD51V65405E Oki Semiconductor, MD51V65405E Datasheet
MD51V65405E
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MD51V65405E Summary of contents
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... The MD51V65405E is a 16,777,216-word × 4-bit dynamic RAM fabricated in Oki’s silicon-gate CMOS technology. The MD51V65405E achieves high integration, high-speed operation, and low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/double-layer metal CMOS process. The MD51V65405E is available in a 32-pin plastic SOJ or 32-pin plastic TSOP. FEATURES · 16,777,216-word × 4-bit configuration Single 3.3V power supply, ± ...
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... Plastic TSOP Function Address Input Row Address Strobe Column Address Strobe Data Input/Data Output Output Enable Write Enable Power Supply (3.3V) Ground (0V) No Connection pin, and the same GND voltage level must CC FEDD51V65405E-03 MD51V65405E DQ4 30 DQ3 ...
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... Ta = 25° MHz) Symbol Min. C — IN1 C — IN2 C — I/O FEDD51V65405E-03 MD51V65405E Value Unit –0 +0 –0 °C –55 to 150 ° ...
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... IH 0.5 − 0.2V , 140 140 , IL 140 = Min. for output open condition FEDD51V65405E-03 MD51V65405E = 3.3V ± 0.3V 70° MD51V65405 E-60 Unit Note Min. Max. 2 0.4 V − 10 µA 10 − 10 µA 10 120 mA 1,2 ...
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... RSH ROH 10,000 CAS CSH CRP RHCP CHO FEDD51V65405E-03 MD51V65405E MD51V65405 E-60 Unit Note Max. ns ns 4,5 4,6 35 ...
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... RWD CPWD RPC CSR CHR WRP WRH FEDD51V65405E-03 MD51V65405E E-60 Unit Note Max ns ns ns ...
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... They are included in the data CPWD ≥ t (Min.), then the cycle is an early write cycle and WCS WCS ≥ t ≥ t (Min.) and t AWD AWD CPWD CPWD FEDD51V65405E-03 MD51V65405E T (Max.) limit, RCD (Max.) limit, RAD ≥ t CWD CWD (Min.), then the cycle is a read modify 7/15 ) ...
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... Valid Data-out RAS t CSH t t RCD RSH t CAS t RAL t CAH t ASC Column t CWL t WCH RWL Valid Data-in FEDD51V65405E-03 MD51V65405E CRP t RRH t RCH t REZ t CEZ t OEZ “H” or “L” CRP Open “H” or “L” 8/15 ...
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... RWC t RAS t CSH t t RCD RSH t CAS t t CAH ASC Column t t CWD RCS t RWD t AWD OEA t OED t CAC RAC t OEZ t CLZ Valid Data-out FEDD51V65405E-03 MD51V65405E CRP t CWL t RWL OEH t DH Valid Data-in “H” or “L” 9/15 ...
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... ASC CAH CAH t ASC Column Column t RCS RCH t WPE OEA CAC WEZ CAC Valid Data-out t CLZ FEDD51V65405E-03 MD51V65405E RHCP CAS t t ASC CAH CAH Column t t OCH RRH t t CAC CHO t OEP OEP t OEA t ...
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... OEA t t OED OEH CAC OEZ DH CAC Valid Valid Data-out Data- CLZ CLZ FEDD51V65405E-03 MD51V65405E HPC RSH t CAS t t ASC CAH Column t t WCS WCH Valid Data-in “H” or “L” t ...
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... RAS RAH Open Note: WE “H” or “L” t RAS t CSR t CHR t t WRP WRH Open Note: OE, Address = “H” or “L” FEDD51V65405E-03 MD51V65405E RPC “H” or “L” RPC t WRP “H” or “L” 12/15 ...
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... RAS t t RCD RSH RP t CAH t ASC Column t RAL t RWL WCH WRP Valid Data-in FEDD51V65405E-03 MD51V65405E RAS CHR t REZ t t WRH CEZ t OEZ “H” or “L” RAS CHR t WRH “H” or “L” ...
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... OKI Semiconductor REVISION HISTORY Document Date No. PEDD51V65405E-01 Jul., 1, 2002 FEDD51V65405E-01 Dec., 27, 2002 FEDD51V65405E-02 Oct., 30, 2003 FEDD51V65405E-03 Jul. 19, 2005 Page Previous Current Edition Edition – – Preliminary edition 1 – – Final edition – – Fixed errata 3 – Block Diagram deleted FEDD51V65405E-03 MD51V65405E Description 14/15 ...
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... The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these part of the contents contained herein may be reprinted or reproduced without our prior permission. FEDD51V65405E-03 MD51V65405E Copyright 2005 Oki Electric Industry Co., Ltd. 15/15 ...