CY82C693UB Cypress Semiconductor Corporation., CY82C693UB Datasheet - Page 120

• Manufacturer Part Number: CY82C693UB
• Description: Hypercache Tm / Stand-alone Pci Peripheral Controller With Usb
• Manufacturer: Cypress Semiconductor Corporation.

Register 23: CY82C693UB Stand-Alone Control and USB Host Controller Control Register (Read/Write)
with an 8-bit access
Bit
7
6:5
4
3
2
1
0
Function
External PCI Arbiter Protocol Control:
0:
1:
Note: This register bit is only for use when the internal PCI arbiter is disabled. If the internal
PCI arbiter is used (pin 194 HIGH at power-up), this register bit does not effect CY82C693UB
operation.
Flush Request/Acknowledge Handshake Control:
00:
01:
However, IRQ8 (the RTC interrupt) is masked internally and will not be seen by the interrupt
controller.
10:
11:
If a Flush Acknowledge is not sent externally (by the system northbridge), bit 6 must
be set to “1.” Otherwise DMA will not work correctly.
Note: Flush request may not be automatically acknowledged internally if a coherent path to
memory is not guaranteed.
IDE Controller Decode Control:
0:
1:
Note: If I/O transactions are allowed above 64KB, this bit should be set to 1. Otherwise,
system conflicts may occur. See IDE Controller Configuration Registers 7, 8, &9.
ROM Space Decode:
0:
1:
Reserved.
Reserved.
USB Interface Control:
0:
1:
All CY82C693UB masters arbitrate for the PCI bus using the PREQ/PGNT signal
pair.
This setting is used to allow USB master arbitration to use the SREQ/SGNT signal
pair. All other CY82C693UB masters use PREQ/PGNT.
Normal Operation: Flush request/acknowledge handshake is performed using the
FREQACK signal.
Flush request/acknowledge handshake is performed using the FREQACK signal.
Flush request is automatically acknowledged internally. The FREQACK signal will
remain in high impedance.
Flush request is automatically acknowledged internally. IRQ8 (the RTC interrupt) is
masked internally and will not be seen by the interrupt controller. IRQ8 is driven out
on the FREQACK pin (pin 190).
IDE Controller decode will only use lower 16 address bits (64KB).
IDE Controller decode will use all 32-bits (4GB).
512KB ROM space decode
1MB ROM space decode
Disable USB interface
Enable USB interface
PRELIMINARY
120
CY82C693UB
Default
0
00
0
0
0
Index=4DH