CY82C693UB Cypress Semiconductor Corporation., CY82C693UB Datasheet - Page 133
CY82C693UB
Manufacturer Part Number
CY82C693UB
Description
Hypercache Tm / Stand-alone Pci Peripheral Controller With Usb
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY82C693UB.pdf
(164 pages)
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USB Host Controller PCI Configuration Registers (Function 3 during Configuration Cycle)
Register 0: Vendor ID Number (Read Only) - Index=00H with a 16-bit access
Register 1: Device ID Number (Read Only) - Index=02H with a 16-bit access
Register 2: Command Register (Read/Write) - Index=04H with a 16-bit access
Bit
15:0
Bit
15:0
Bit
15:10
9
8
7
6
5
4
3
2
1
0
Function
Cypress ID Number: 0001000010000000
Function
CY82C693UB Device ID Number: 1100011010010011
Function
Reserved. Always 0.
Fast Back-to-Back enable:
0:
1
The USB Host Controller always generates fast back-to-back access. Therefore, this bit must
be set to 1.
SERR Reporting Enable:
0:
1:
Wait Cycle Control. Always 0.
PERR Detection Enabled. Not supported by CY82C693UB.
VGA Palette Snooping. Always 0
Memory Write and Invalidate Command Enable
Special Cycle Enable. Always 0.
PCI Master Enable:
0:
1:
This bit enables the USB Host Controller to act as a PCI master. If set to 0, no PCI access
will be generated by the USB Host Controller. This bit must be set to 1 before USB transac-
tions can start.
Memory Access Enable:
0:
1:
This bit must be set to 1 for the USB Host Controller to perform memory acces.
I/O Access Enable:
0:
1:
This bit must be set to 1 for the USB Host Controller to perform I/O access
Disabled
Enabled
Disabled
Enabled
Bus Master Disabled
Bus Master Enabled
Memory Access Disabled
Memory Access Enabled
I/O Access Disabled
I/O Access Enabled
PRELIMINARY
133
CY82C693UB
Default
1080H
Default
C693H
Default
000000
0
0
0
0
0
0
0
0
0
0
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