CY82C693UB Cypress Semiconductor Corporation., CY82C693UB Datasheet - Page 139

• Manufacturer Part Number: CY82C693UB
• Description: Hypercache Tm / Stand-alone Pci Peripheral Controller With Usb
• Manufacturer: Cypress Semiconductor Corporation.

Register 4: HcInterruptEnable (Read/Write) - Offset=10H with a 32-bit access
Bit
31
30
29:7
6
5
4
3
2
1
0
Function
Master Interrupt Enable:
This bit is a global interrupt enable. A write of ‘1’ allows interrupts to be enabled via the specific
enable bits listed below.
Ownership Change Enable:
0:
1:
Reserved.
Root Hub Status Change Enable:
0:
1:
Frame Number Overflow Enable:
0:
1:
Unrecoverable Error Enable:
This event is not implemented. All writes to this bit will be ignored.
Resume Detected Enable:
0:
1:
Start Of Frame Enable:
0:
1:
Writeback Done Head Enable:
0:
1:
Scheduling Overrun Enable:
0:
1:
Ignore
Enable interrupt generation due to Ownership Change
Ignore
Enable interrupt generation due to Root Hub Status Change
Ignore
Enable interrupt generation due to Frame Number Overflow
Ignore
Enable interrupt generation due to Resume Detected
Ignore
Enable interrupt generation due to Start of Frame
Ignore
Enable interrupt generation due to Writeback Done Head
Ignore
Enable interrupt generation due to Scheduling Overrun
PRELIMINARY
139
CY82C693UB
Default
0
0
0H
0
0
0
0
0
0
0