CY82C693UB Cypress Semiconductor Corporation., CY82C693UB Datasheet - Page 3

no-image

CY82C693UB

Manufacturer Part Number
CY82C693UB
Description
Hypercache Tm / Stand-alone Pci Peripheral Controller With Usb
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY82C693UB-NC
Manufacturer:
PHILIPS
Quantity:
192
Part Number:
CY82C693UB-NC
Manufacturer:
CYPRESS
Quantity:
300
Part Number:
CY82C693UB-NC
Manufacturer:
CYPRESS
Quantity:
25
Write-Only Shadow Registers ................................................................................................................ 40
General Purpose I/O Registers .............................................................................................................. 42
Power Management Control Registers .................................................................................................. 44
Register 1: Peripheral Configuration Register #1 (Read/Write) — Index=01H ................................................ 37
Register 2: Peripheral Configuration Register #2 (Read/Write) - Index=02H .................................................. 38
Register 3: Interrupt Request Level/Edge Control Register #1 (Read/Write) - Index=03H ............................. 38
Register 4: Interrupt Request Level/Edge Control Register #2 (Read/Write) - Index=04H ............................. 39
Register 5: Real-Time-Clock Configuration Register (Read/Write) - Index=05H ............................................ 39
Register 80: DMA1 Write Request Shadow Register (Read/Write) - Index=80H ........................................... 40
Register 81: DMA1 Write Single Mask Bit Shadow Register (Read/Write) - Index=81H ................................ 40
Register 82: DMA1 Write Mode Shadow Register (Read/Write) - Index=82H ............................................... 40
Register 83: DMA1 Clear Byte Pointer Shadow Register (Read/Write) - Index=83H ..................................... 40
Register 84: DMA1 Master Clear Shadow Register (Read/Write) - Index=84H ............................................. 40
Register 85: DMA1 Clear Mask Shadow Register (Read/Write) - Index=85H ................................................ 40
Register 86: Timer Counter 1 Command Mode Shadow Register (Read/Write) - Index=86H ....................... 40
Register 87: CMOS Battery-Backed RAM Address and NMI Mask Registers Shadow Register
(Read/Write) - Index=87H ............................................................................................................................... 40
Register 88: DMA2 Write Request Shadow Register (Read/Write) - Index=88H ........................................... 40
Register 89: DMA2 Write Single Mask Bit Shadow Register (Read/Write) - Index=89H ................................ 41
Register 8A: DMA2 Write Mode Shadow Register (Read/Write) - Index=8AH ............................................... 41
Register 8B: DMA2 Clear Byte Pointer Shadow Register (Read/Write) - Index=8BH .................................... 41
Register 8C: DMA2 Mask Clear Shadow Register (Read/Write) - Index=8CH .............................................. 41
Register 8D: DMA2 Clear Mask Shadow Register (Read/Write) - Index=8DH .............................................. 41
Register 8E: Coprocessor Error Shadow Register (Read/Write) - Index=8EH ............................................... 41
Register 8F: Extended CMOS RAM address Shadow Register (Read/Write) - Index=8FH ........................... 41
Register 90: General Purpose I/O Control Register A (Read/Write) - Index=90H .......................................... 42
Register 91: General Purpose I/O Input/Output Control Register A (Read/Write) - Index=91H ..................... 42
Register 92: General Purpose I/O Control Register B (Read/Write) - Index=92H .......................................... 43
Register 93: General Purpose I/O Input/Output Control Register B (Read/Write) - Index=93H ..................... 43
Register 40: Standby Timer Event Detection Control (Read/Write) - Index=40H ........................................... 44
Register 41: Standby Timer Interrupt Request Detection Control #1 (Read/Write) - Index=41H ................... 45
Register 42: Standby Timer Interrupt Request Detection Control #2 (Read/Write) - Index=42H ................... 45
Register 43: Standby Timer DMA Request Detection Control #1 (Read/Write) - Index=43H ......................... 46
Register 44: Suspend Timer Event Detection Control (Read/Write) - Index=44H .......................................... 46
Register 45: Suspend Timer Interrupt Request Detection Control #1 (Read/Write) - Index=45H .................. 47
Register 46: Suspend Timer Interrupt Request Detection Control #2 (Read/Write) - Index=46H .................. 47
Register 47: Suspend Timer DMA Request Detection Control #1 (Read/Write) - Index=47H ........................ 48
Register 48: User Timer 1 Event Detection Control (Read/Write) - Index=48H ............................................. 48
Register 49: User Timer 1 Interrupt Request Detection Control #1 (Read/Write) - Index=49H ...................... 49
Register 4A: User Timer 1 Interrupt Request Detection Control #2 (Read/Write) - Index=4AH ..................... 49
Register 4B: User Timer 1 DMA Request Detection Control #1 (Read/Write) - Index=4BH .......................... 50
Register 4C: Throttle Timer Event Detection Control (Read/Write) - Index=4CH ........................................... 50
Register 4D: Throttle Timer Interrupt Request Detection Control #1 (Read/Write) - Index=4DH ................... 51
Register 4E: Throttle Timer Interrupt Request Detection Control #2 (Read/Write) - Index=4EH ................... 51
Register 4F: Throttle Timer DMA Request Detection Control #1 (Read/Write) - Index=4FH ......................... 52
Register 50: Non-motherboard Memory Address Range Decode for Event Detection
Register #1 (Read/Write) - Index=50H ........................................................................................................... 52
Register 51: Non-motherboard Memory Address Range Decode for Event Detection
Register #2 (Read/Write) - Index=51H ........................................................................................................... 52
Register 52: Non-motherboard Memory Address Mask for Event Detection Register #1
(Read/Write) - Index=52H ............................................................................................................................... 52
PRELIMINARY
TABLE OF CONTENTS
3
(continued)
CY82C693UB

Related parts for CY82C693UB