CY82C693UB Cypress Semiconductor Corporation., CY82C693UB Datasheet - Page 5

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CY82C693UB

Manufacturer Part Number
CY82C693UB
Description
Hypercache Tm / Stand-alone Pci Peripheral Controller With Usb
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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CY82C693UB
PRELIMINARY
TABLE OF CONTENTS
(continued)
DMA Register 7: DMAC1 Channel 3 Current Word Count Register (Read/Write) - I/O Address=007H ......... 73
DMA Register 8: DMAC1 Status/Command Register (Read/Write) - I/O Address=008H ............................... 73
Status Register Format (Read Only) ............................................................................................................... 74
Command Register Format (Write Only) ......................................................................................................... 75
DMA Register 9: DMAC1 DMA Request Register (Write Only) - I/O Address=009H ...................................... 75
DMA Request Register Write Format .............................................................................................................. 75
DMA Register 10: DMAC1 DMA Command/Mask Register (Write Only) - I/O Address=00AH ....................... 76
DMA Request Mask Register Write Single Bit Format .................................................................................... 76
DMA Register 11: DMAC1 DMA Mode Register (Write Only) - I/O Address=00BH ........................................ 76
Mode Register Format ..................................................................................................................................... 77
DMA Register 12: DMAC1 Address Space Expansion Flip-Flop Control Register (Write Only) -
I/O Address=00CH .......................................................................................................................................... 77
DMA Register 13: DMAC1 Master Clear Register (Write Only) - I/O Address=00DH ..................................... 77
DMA Register 14: DMAC1 DMA Mask Clear Register (Write Only) - I/O Address=00EH ............................... 77
DMA Register 15: DMAC1 Request Mask Register Control (Read/Write) - I/O Address=00FH ..................... 78
DMA Request Mask Register Read and Write All Bits Format ........................................................................ 78
DMA Register 16: DMAC2 Channel 0 (Channel 4) Current Address Register (Read/Write) -
I/O Address=0C0H .......................................................................................................................................... 78
DMA Register 17: DMAC2 Channel 0 (Channel 4) Current Word Count Register (Read/Write) -
I/O Address=0C2H .......................................................................................................................................... 78
DMA Register 18: DMAC2 Channel 1 (Channel 5) Current Address Register (Read/Write) -
I/O Address=0C4H .......................................................................................................................................... 78
DMA Register 19: DMAC2 Channel 1 (Channel 5) Current Word Count Register (Read/Write) -
I/O Address=0C6H .......................................................................................................................................... 79
DMA Register 20: DMAC2 Channel 2 (Channel 6) Current Address Register (Read/Write) -
I/O Address=0C8H .......................................................................................................................................... 79
DMA Register 21: DMAC2 Channel 2 (Channel 6) Current Word Count Register (Read/Write) -
I/O Address=0CAH .......................................................................................................................................... 79
DMA Register 22: DMAC2 Channel 3 (Channel 7) Current Address Register (Read/Write) -
I/O Address=0CCH .......................................................................................................................................... 79
DMA Register 23: DMAC2 Channel 3 (Channel 7) Current Word Count Register (Read/Write) -
I/O Address=0CEH .......................................................................................................................................... 79
DMA Register 24: DMAC2 Status/Command Register (Read/Write) - I/O Address=0D0H ............................. 79
Status Register Format (Read Only) ............................................................................................................... 80
Command Register Format (Write Only) ......................................................................................................... 81
DMA Register 25: DMAC2 DMA Request Register (Write Only) - I/O Address=0D2H ................................... 81
DMA Request Register Write Format .............................................................................................................. 81
DMA Register 26: DMAC2 DMA Command/Mask Register (Write Only) - I/O Address=0D4H ...................... 82
DMA Request Mask Register Write Single Bit Format .................................................................................... 82
DMA Register 27: DMAC2 DMA Mode Register (Write Only) - I/O Address=0D6H ........................................ 82
Mode Register Format ..................................................................................................................................... 83
DMA Register 28: DMAC2 Address Space Expansion Flip-Flop Control Register (Write Only) -
I/O Address=0D8H .......................................................................................................................................... 83
DMA Register 29: DMAC2 Master Clear Register (Write Only) - I/O Address=0DAH ..................................... 83
DMA Register 30: DMAC2 DMA Mask Clear Register (Write Only) - I/O Address=0DCH .............................. 83
DMA Register 31: DMAC2 Request Mask Register Control (Read/Write) - I/O Address=0DEH .................... 84
DMA Request Mask Register Read and Write All Bits Format ........................................................................ 84
DMA Register 32: DMAC1 Channel 2 Page Address Register (Read/Write) - Index=081H ........................ 84
DMA Register 33: DMAC1 Channel 3 Page Address Register (Read/Write) - Index=082H ........................ 84
DMA Register 34: DMAC1 Channel 1 Page Address Register (Read/Write) - Index=083H ........................ 84
DMA Register 35: DMAC1 Channel 0 Page Address Register (Read/Write) - Index=087H ........................ 84
DMA Register 36: DMAC2 Channel 6 Page Address Register (Read/Write) - Index=089H ........................ 84
5

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