CY82C693UB Cypress Semiconductor Corporation., CY82C693UB Datasheet - Page 85

• Manufacturer Part Number: CY82C693UB
• Description: Hypercache Tm / Stand-alone Pci Peripheral Controller With Usb
• Manufacturer: Cypress Semiconductor Corporation.

DMA Register 38: DMAC2 Channel 5 Page Address Register (Read/Write)
DMA Register 39: DMAC1 Extended Mode Control (Write Only)
DMAC1 Extended Mode Control Register Format (This register is cleared on CPURST.)
DMA Register 40: DMAC1 Channel 2 High Page Address Register (Read/Write)
DMA Register 41: DMAC1 Channel 3 High Page Address Register (Read/Write)
DMA Register 42: DMAC1 Channel 1 High Page Address Register (Read/Write)
DMA Register 43: DMAC1 Channel 0 High Page Address Register (Read/Write)
Bit
7:0
I/O Read I/O Write Flip-Flop State Function
Bit
7:6
5:4
3
2
1
0
Bit
7:0
Bit
7:0
Bit
7:0
Bit
7:0
0
1
1
0
Function
Page Address (Address bits 23–16) for DMAC2 (16-bit DMA Controller), Channel 5
Function
Reserved
DMA Cycle Timing Mode:
00:
01:
10:
11:
DMA Channel 3 Select:
0:
1:
DMA Channel 2 Select:
0:
1:
DMA Channel 1 Select:
0:
1:
DMA Channel 0 Select:
0:
1:
Function
High Page Address (Address bits 31–24) for DMAC1 (8-bit DMA Controller), Channel 2
Function
High Page Address (Address bits 31–24) for DMAC1 (8-bit DMA Controller), Channel 3
Function
High Page Address (Address bits 31–24) for DMAC1 (8-bit DMA Controller), Channel 1
Function
High Page Address (Address bits 31–24) for DMAC1 (8-bit DMA Controller), Channel 0
X
X
Compatible Timing
Type “A” Timing
Type “B” Timing
Type “F” Timing
Channel 3 Not Selected
Channel 3 Selected
Channel 2 Not Selected
Channel 2 Selected
Channel 1 Not Selected
Channel 1 Selected
Channel 0 Not Selected
Channel 0 Selected
Undefined
Write DMA Request Mask Register
PRELIMINARY
85
I/O Address=40BH
Index=08BH
Index=481H
Index=482H
Index=483H
Index=487H
CY82C693UB
Default
00000000
Default
00
00
0
0
0
0
Default
00000000
Default
00000000
Default
00000000
Default
00000000