IR3094M International Rectifier Corp., IR3094M Datasheet - Page 17

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IR3094M

Manufacturer Part Number
IR3094M
Description
3 Phase Pwm Controller For Point Of Load
Manufacturer
International Rectifier Corp.
Datasheet

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Once C
time
respectively.
VREF Compensation Network R
A RC network tied between VREF pin and VOSENS- is needed to compensate VREF circuit. VREF should come up
earlier than SS/DEL pin charged up to 3.75V. For save estimation, use half of the soft start time that is 0.5*
the VREF voltage establishing time. Use equation (7) and (8) to determine R
current I
CHARACTERISTICS section.
Over Current Protection (OCP)
The current limit threshold is set by a resistor connected between the OCSET and VREF pins. If the average
Current Sense Amplifier output plus VREF voltage exceeds the OCSET voltage, the over-current protection is
triggered.
A delay is included if an over-current condition occurs after a successful soft-start sequence. This is required since
over-current conditions can occur as part of normal operation due to load transients. If an over-current fault occurs
during normal operation, the Over Current Comparator will initiate the discharge of the capacitor at SS/DEL but will
not set the fault latch immediately. If the over-current condition persists long enough for the SS/DEL capacitor to
discharge below the 245mV offset of the delay comparator, the Fault latch will be set pulling the Error Amplifier’s
output low inhibiting switching in the phase ICs and de-asserting the PWRGD signal. The hiccup mode duty cycle of
over current protection is determined by the fixed 10:1 ratio of the charge to discharge current.
The inductor DC resistance R
resistor R
current limit. I
Operating Characteristics Section. OCP need to satisfy the high temperature condition. R
the inductor DCR at maximum temperature T
inductor DCR can be calculated from Equation (9)
t
VccPG
SS
Page 17 of 29
SOURCE
OCSET
is chosen, the soft start delay time
from output voltage (V
OCSET,
connected between the OCSET and VREF pins, as shown in Fig6. I
is determained by R
the bias current of OCSET pin, is set by R
L
is utilized to sense the inductor current. The current limit threshold is set by a
REF
O
t
t
t
VccPG
SSDEL
OCDEL
) in regulation to Power Good are fixed and shown in equation (4), (5) and (6)
C
R
and C
ROSC
REF
REF
C
C
C
REF
I
SS
SS
0
and can be found using the curve in the TYPICAL OPERATING
I
I
SS
I
DISCHG
t
SOURCE
5 .
CHG
CHG
SSDEL,
L_MAX
*
*
*

'
'
'
V
V
3
V
V
2 .
*
REF
C
and room temperature T_
the over-current fault latch delay time
0
REF
60
C
C
10
5 .
C
61
SS
SS
SS
*
2
*
¤
15
*
t
10
1 *
( *
*
SS
10
. 0
1 .
¡
. 3
60
6
¢
ROSC
25
6
75
*
10

and is determined by the curve in the Typical
V
£
6
O

(8)
(7)
1
) 1 .
REF
ROOM
and C
(4)
(5)
(6)
respectively, the maximum
LIMIT
REF
L_MAX
IR3094PBF
t
OCDEL
where VREF source
is the required over
09/26/05
and R
, and the delay
L_ROOM
t
SS
are
as

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