CYWUSB6935 Cypress Semiconductor Corporation., CYWUSB6935 Datasheet - Page 19

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CYWUSB6935

Manufacturer Part Number
CYWUSB6935
Description
Lr 2.4-ghz Dsss Radio Soc
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Document #: 38-16008 Rev. *D
Bit
7:6 VCO Slope Enable
5:0 Reserved
Bit
7
6:0
Bit
7
6:0
Bit Name
7:0 Manual Clock Overrides
Bit
7:0
Carrier Detect
Reg Power
Override
Control
Name
(Write-Only)
Name
Carrier Detect Override
Reserved
Name
Reg Power
Control
Reserved
Name
Manual Clock Enables This register must be written with 0x41 after reset for correct operation
7
VCO Slope Enable
7
7
7
7
Addr: 0x2E
Addr: 0x26
Addr: 0x2F
Addr: 0x32
Addr: 0x33
Description
When set, this bit disables unused circuitry and saves radio power. The user must set Reg 0x20, bit 6 = 1 to enable writes
to Reg 0x2E. The application MCU must set this bit during initialization.
These bits are reserved and should be written with zeroes.
6
6
6
6
6
Description
The Voltage Controlled Oscillator (VCO) Slope Enable bits are used to specify the amount of variance automatically
added to the VCO.
These bits are undefined for read operations.
These bits are reserved and should be written with zeroes.
11 = –5/+5 VCO adjust. The application MCU must configure this option during initialization
10 = –2/+3 VCO adjust
01 = Reserved
00 = No VCO adjust
Description
Description
When set, this bit overrides carrier detect. The user must set Reg 0x20, bit 6=1 to enable writes to Reg 0x2F.
These bits are reserved and should be written with zeroes.
Description
This register must be written with 0x41 after reset for correct operation
5
5
5
5
5
Figure 7-27. Reg Power Control
Figure 7-26. VCO Calibration
Figure 7-28. Carrier Detect
Figure 7-29. Clock Manual
Figure 7-30. Clock Enable
REG_CARRIER_DETECT
REG_CLOCK_MANUAL
REG_CLOCK_ENABLE
Manual Clock Overrides
Manual Clock Enables
REG_VCO_CAL
4
4
4
4
4
REG_PWR_CTL
Reserved
Reserved
3
3
3
3
3
Reserved
2
2
2
2
2
1
1
1
1
1
CYWUSB6935
Default: 0x00
Default: 0x00
Default: 0x00
Default: 0x00
Default: 0x00
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