CYWUSB6935 Cypress Semiconductor Corporation., CYWUSB6935 Datasheet - Page 20

• Manufacturer Part Number: CYWUSB6935
• Description: Lr 2.4-ghz Dsss Radio Soc
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-16008 Rev. *D
Bit
7:0
Bit
31:30 Address[31:30] These bits are read back as zeroes.
29:0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Name Description
Count
Name
Address[29:0]
7
Address 0x3F
Addr: 0x38
Addr: 0x3C-3F
Determines the length of delay in 2-µs increments for the synthesizer to lock when auto synthesizer is enabled via Control register
(0x03, bit 1=0) and not using the PLL lock signal. The default register setting is typically sufficient.
Description
These bits are the Manufacturing ID (MID) for each IC. The contents of these bits cannot be read unless the MID Read
Enable bit (bit 5) is set in the Analog Control register (Reg 0x20). Enabling the Manufacturing ID register (Reg 0x3C-0x3F)
consumes power. The MID Read Enable bit in the Analog Control register (Reg 0x20, bit 5) should only be set when
reading the contents of the Manufacturing ID register (Reg 0x3C-0x3F). This register is read-only.
6
5
Address 0x3E
Figure 7-31. Synthesizer Lock Count
Figure 7-32. Manufacturing ID
REG_SYN_LOCK_CNT
4
REG_MID
Count
3
Address 0x3D
2
9
8
7
6
1
CYWUSB6935
Default: 0x64
5
Address 0x3C
4
3
Page 20 of 32
2
0
1
0
[+] Feedback