CYWUSB6935 Cypress Semiconductor Corporation., CYWUSB6935 Datasheet - Page 8

• Manufacturer Part Number: CYWUSB6935
• Description: Lr 2.4-ghz Dsss Radio Soc
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-16008 Rev. *D
Bit
7:4
3:0
Bit
7
6
5
4
3
2
1
0
Enable
Name
RX Enable
TX Enable
PN Code
Select
Bypass
Internal Syn
Lock Signal
Auto Internal
PA Disable
Internal PA
Enable
Reserved
Reserved
RX
Name
7
7
Silicon ID
Product ID
Addr: 0x00
Addr: 0x03
Description
These are the Silicon ID revision bits. 0000 = Rev A, 0001 = Rev B, etc. These bits are read-only.
These are the Product ID revision bits. Fixed at value 0111. These bits are read-only.
Enable
Description
The Receive Enable bit is used to place the IC in receive mode.
The Transmit Enable bit is used to place the IC in transmit mode.
The Pseudo-Noise Code Select bit selects between the upper or lower half of the 64 chips/bit PN code.
This bit applies only when the Code Width bit is set to 32 chips/bit PN codes (Reg 0x04, bit 2=1).
This bit controls whether the state machine waits for the internal Syn Lock Signal before waiting for the amount of time
specified in the Syn Lock Count register (Reg 0x38), in units of 2 µs. If the internal Syn Lock Signal is used then set
Syn Lock Count to 25 to provide additional assurance that the synthesizer has settled.
It is recommended that the application MCU sets this bit to 1 in order to guarantee a consistent settle time for the
synthesizer.
The Auto Internal PA Disable bit is used to determine the method of controlling the Internal Power Amplifier. The two
options are automatic control by the baseband or by firmware through register writes. For external PA usage, please
see the description of the REG_ANALOG_CTL register (Reg 0x20).
When this bit is set to 1, the enabled state of the Internal PA is directly controlled by bit Internal PA Enable (Reg 0x03,
bit 2). It is recommended that this bit is set to 0, leaving the PA control to the baseband.
The Internal PA Enable bit is used to enable or disable the Internal Power Amplifier.
This bit only applies when the Auto Internal PA Disable bit is selected (Reg 0x03, bit 3=1), otherwise this bit is don’t care.
This bit is reserved and should be written with a zero.
This bit is reserved and should be written with a zero.
TX
1 = Bypass the Internal Syn Lock Signal and wait the amount of time in Syn Lock Count register (Reg 0x38)
1 = Receive Enabled
0 = Receive Disabled
0 = Wait for the Syn Lock Signal and then wait the amount of time specified in Syn Lock Count register (Reg 0x38)
6
6
1 = Transmit Enabled
0 = Transmit Disabled
1 = 32 Most Significant Bits of PN code are used
0 = 32 Least Significant Bits of PN code are used
1 = Register controlled Internal PA Enable
0 = Auto controlled Internal PA Enable
1 = Internal Power Amplifier Enabled
0 = Internal Power Amplifier Disabled
Silicon ID
PN Code
Select
5
5
Figure 7-1. Revision ID Register
Bypass Internal
Syn Lock
Signal
Figure 7-2. Control
REG_CONTROL
4
4
REG_ID
Auto Internal
Disable
PA
3
3
Internal PA
Enable
2
2
Product ID
Reserved
1
1
CYWUSB6935
Default: 0x07
Default: 0x00
Page 8 of 32
Reserved
0
0
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