CD22103AD Intersil Corporation, CD22103AD Datasheet - Page 4

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CD22103AD

Manufacturer Part Number
CD22103AD
Description
CMOS HDB3 High Density Bipolar 3 Transcoder for 2.048/8.448Mb/s Transmission Applications
Manufacturer
Intersil Corporation
Datasheet

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The received 4 data bits previous to reception of the violation
pulse have not been the sequence BX00 (where X = don't
care). The error signal (ERR) remains low.
NOTES:
• AMl Signals HDB3/AMl = Low
• In Either the HDB3 or AMI Mode
Alarm Inhibit Signal
1. The data sequences B000V and BB00V are valid HDB3 codings
2. The error signal (ERR) count, is the accurate number of all single
- A coding error (ERR) is signaled when a violation pulse
- When high levels appear simultaneously on both HDB3
- The alarm output (AIS) is set high if, in two successive
- The alarm output (AlS) is reset low when three or more
of the NRZ binary sequence 10000.
bit errors.
(+V) is received.
inputs (+ HDB3 IN, -HDB3 IN) a logical one is assumed
in the HDB3/AMl input stream and the error signal
(ERR) goes high for the duration of the violation.
periods of the external Reset Alarm Signal (RAlS), less
than three zeros are received.
zeros are received during two Reset Alarm Signal periods.
FIGURE 1. TRANSMITTER CODER OPERATION TIMING WAVEFORMS - NRZ TO HDB3/AMI CODING
EXTERNAL GENERATED
EXTERNAL GENERATED
NRZ - IN
CTX
71
TERNERY HDB3
+HDB3 OUT
+HDB3 OUT
-HDB3 OUT
-HDB3 OUT
HANDLING DELAY
CODED
CODED
HDB3
AMI
AMI
CD22103A
Transcoder Operation
Transmitter Coder (See Figure 1)
The HDB3/AMI transmitter coder operates on 4-bit serial
strings of NRZ binary data and a synchronous transmitter
clock (CTX). NRZ binary data is serially clocked into the
transmitter on the negative transition of the (CTX) clock.
HDB3/AMI coding is performed on the 4-bit string, and
HDB3/AMI binary output data is clocked out to the (+HDB3
OUT, -HDB3 OUT) outputs on the positive transition of the
transmitter clock (CTX) 3 1/2 clock pulses after the data
appeared at the (NRZ-IN) input.
Receiver Decoder (See Figure 2)
The HDB3/AMI receiver decoder operates on 4-bit serial
strings of binary coded HDB3/AMI signals, and a synchro-
nous receiver clock (CRX), HDB3/AMI binary data is serially
clocked into the receiver on the positive transition of the
(CRX) clock. HDB3/AMI decoding is performed on the 4-bit
string, and NRZ binary output data is clocked out to the
(NRZ-OUT) output on the positive transition of the receiver
clock (CRX) 4 clock pulses after the data appeared at the
(+HDB3 IN, -HDB3 IN) inputs.

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