CD2231 Intel Corporation, CD2231 Datasheet - Page 112

• Manufacturer Part Number: CD2231
• Description: CD2231 Intelligent Two-channel Lan And Wan Communications Controller
• Manufacturer: Intel Corporation

CD2231 — Intelligent Two-Channel LAN and WAN Communications Controller
8.3.2.2
8.4
8.4.1
112
Register Name: TCOR
Register Description: Transmit Clock Option
Default Value: x’00
Access: Byte Read/Write
ClkSel2
Bit 7
Transmit Clock Option Register (TCOR)
This register controls the transmit bit rate generator and Local Loopback mode.
Bits 7:5
NOTE: See the description of clock options in
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Channel Command and Status Registers
Channel Command Register (CCR)
There are two CCR command sets. Mode 1 (if bit 7 is ‘0’) commands affect basic channel control.
In Mode 2 (if bit 7 is ‘1’), additional commands that control timer functions are available.
ClkSel1
Bit 6
These bits select the clock source for the transmit bit rate generator.
Reserved – must be ‘0’.
Times 1 external clock. This bit is set to ‘1’ when the user supplies the data clock on
TXCIN pin whose frequency is equal to the transmit data rate. When using the exter-
nal 1 clock or the clock from the receiver’s DPLL, the TBPR must be programmed
to 01h.
Reserved – must be ‘0’.
Local Loopback mode
1 = enables the Local Loopback mode
0 = disables the Local Loopback mode
Reserved – must be ‘0’.
ClkSel0
Bit 5
ClkSel2
0
0
0
0
1
1
1
1
Bit 4
0
ClkSel1
0
0
1
1
0
0
1
1
Section
Ext-1X
Bit 3
5.5.
ClkSel0
0
1
0
1
0
1
0
1
Bit 2
0
Select
Clk 0
Clk 1
Clk 2
Clk 3
Clk 4
Reserved
External clock
Receive clock
Motorola Hex Address: x’C0
Bit 1
LLM
Intel Hex Address: x’C2
Datasheet
Bit 0
0