CD2231 Intel Corporation, CD2231 Datasheet - Page 119

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CD2231

Manufacturer Part Number
CD2231
Description
CD2231 Intelligent Two-channel Lan And Wan Communications Controller
Manufacturer
Intel Corporation
Datasheet
8.4.3.3
Datasheet
Register Name: CSR
Register Description: Channel Status
Default Value: x’00
Access: Byte Read/Write
RxEn
Bit 7
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Async-HDLC/PPP Mode
Bit 7
Bit 6
RxFloff
Bit 6
Intelligent Two-Channel LAN and WAN Communications Controller — CD2231
Receiver enable
0 = Receiver is disabled
1 = Receiver is enabled
Receive flow off
0 = Normal
1 = The CD2231 has requested the remote to stop transmission (Send XOFF com-
mand has been given to the channel). This bit is reset when the CD2231 has
requested the remote to restart transmission, or when the receiver is enabled or dis-
abled, or the channel is reset.
Receive flow on
0 = Normal
1 = The CD2231 has requested the remote to restart character transmission (Send
XON command has been given to the channel). This bit is reset when the next (non-
flow control) character is received, or when the receiver is enabled or disabled, or the
channel is reset.
Unused
Transmitter enable
0 = Transmitter is disabled
1 = Transmitter is enabled
Transmit flow off
0 = Normal
1 = The CD2231 has been requested by the remote to stop transmission. This bit is
reset when the CD2231 receives a request to resume transmission, or when the trans-
mitter is enabled or disabled, or the channel is reset.
Transmit flow on
0 = Normal
1 = The CD2231 has been requested by the remote to resume transmission. This bit
is reset once character transmission is resumed, or when the transmitter is enabled or
disabled, or the channel is reset.
Unused
RxEn – Receiver enabled status
When set, the receiver is enabled.
When clear, the receiver is disabled.
RxFloff – Receive flow off status
When set, Xoff has been transmitted as commanded in the STCR. RxFloff indicates
that the remote station has been requested to stop transmission. RxFloff remains set
until the host issues an STCR command to send an Xon, or when the receiver is
enabled or disabled, or the channel is reset.
RFram
Bit 5
Ridle
Bit 4
TxEn
Bit 3
TxFloff
Bit 2
Motorola Hex Address: x’1A
TFram
Bit 1
Intel Hex Address: x’19
Tidle
Bit 0
119

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