CD2231 Intel Corporation, CD2231 Datasheet - Page 96

• Manufacturer Part Number: CD2231
• Description: CD2231 Intelligent Two-channel Lan And Wan Communications Controller
• Manufacturer: Intel Corporation

CD2231 — Intelligent Two-Channel LAN and WAN Communications Controller
8.2.4.2
96
Register Name: COR3
Register Description: Channel Option Register 3
Default Value: x’00
Access: Byte Read/Write
sndpad
Bit 7
HDLC Mode
In Synchronous mode, COR3 is used to specify the learning pattern (pad character) sent by the
CD2231 to synchronize the DPLL at the remote end. The pad character (00h or AAh) sent depends
on the kind of encoding used.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bits 2:0
Bit 6
Alt1
Sends pad character(s)
1 = CD2231 sends pad character(s) before sending flag when coming out of the Idle-
in Mark mode.
0 = CD2231 does not send any pad character.
alt1 – send sync pattern
1 = AAh (Manchester/NRZ encoding) is sent as pad character.
0 = 00h (NRZI encoding) is sent as pad character.
FCS preset
0 = FCS is preset to all ‘1’s (CRC V.41).
1 = FCS is preset to all ‘0’s (CRC-16).
FCS mode
1 = Disables FCS generation and checking. The CD2231 treats the entire frame as
data.
0 = Normal FCS mode. The CD2231 generates and appends CRC on transmit and
validates CRC on receive using the CRC polynomial selected through the CRC Poly-
nomial Select register.
Idle mode
0 = Idle-in Flag mode
1 = Idle-in Mark mode
Character Count – specifies the number of synchronous characters sent.
FCSPre
Bit 5
npad2
0
0
0
0
1
101–111 are reserved.
Bit 4
FCS
npad1
0
0
1
1
0
npad0
Bit 3
idle
0
1
0
1
0
Reserved
1 pad character sent
2 pad characters sent
3 pad characters sent
4 pad characters sent
npad2
Bit 2
Motorola Hex Address: x’16
npad1
Bit 1
Intel Hex Address: x’15
Datasheet
npad0
Bit 0