CD2231 Intel Corporation, CD2231 Datasheet - Page 101

• Manufacturer Part Number: CD2231
• Description: CD2231 Intelligent Two-channel Lan And Wan Communications Controller
• Manufacturer: Intel Corporation

8.2.8
Datasheet
Register Name: COR7
Register Description: Channel Option Register 7
Default Value: x’00
Access: Byte Read/Write
IStrip
Bit 7
Bits 2:0
Channel Option Register 7 (COR7) — Async Mode Only
CR is defined as 0D hex, NL as 0A hex and NULL as 00 hex.
Bit 7
Bit 6
Bit 5
Bit 6
LNE
Intelligent Two-Channel LAN and WAN Communications Controller — CD2231
Parity/framing error actions – These bits determine the action taken when a parity or
framing error is received.
Following the generation of a break-exception interrupt, a receive exception inter-
rupt is generated with RET bit (RISRl[7]) set, when the end of break is detected. The
RET interrupt must be enabled in IER[5] to enable this feature.
When ParMrk = 1 and ParInt = 1, each occurrence of FF hex in the data stream is
preceded by FF hex to distinguish it from a parity error sequence.
IStrip – when this bit is set, the most-significant bit of receive characters is stripped,
leaving 7-bit characters. IStrip is applied after all other character processing, but
before special character processing.
LNext – this bit enables the LNext option
0 = All receive characters are processed for special character detection.
1 = The character following the LNext character is not processed for special charac-
ter matching or flow control.
This provides a mechanism to transfer flow control and special characters as normal
data, without invoking flow control action in the CD2231, and without generating
special interrupts. The LNext character is defined in the LNXT register, and when
processed, is always passed to the host CPU as normal data.
Flow control on error characters
0 = Characters received with an error are not processed for special character/flow
control matching.
FCErr
Bit 5
ParMrk
0
0
0
0
1
1
1
1
Bit 4
INPCK
0
0
0
1
1
0
0
1
1
ParInt
Bit 3
0
0
1
0
1
0
1
0
1
Generated an exception interrupt
Translated to a NULL character
Ignore error; character passed on as good
data
Discard error character
Reserved
Translate to a sequence of FF NULL and the
error character and pass on as Good Data
Reserved
Reserved
Bit 2
0
Motorola Hex Address: x’07
ONLCR
Bit 1
Intel Hex Address: x’04
OCRNL
Bit 0
101