CD2231 Intel Corporation, CD2231 Datasheet - Page 11

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CD2231

Manufacturer Part Number
CD2231
Description
CD2231 Intelligent Two-channel Lan And Wan Communications Controller
Manufacturer
Intel Corporation
Datasheet
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1.1
Datasheet
INTERFACE
Figure 1. Functional Block Diagram
HOST
Benefits
Number of serial channels
Interrupt on-chip DMA mechanism
FIFO depth (per channel and per
direction)
Data size (bits)
ASYNC
SDLC/HDLC
X.21, bisync
Async-HDLC, PPP
SLIP
MNP 4
Serial data rate (kbits/second)
Number of modem leads
(per channel, including RxD and
TxD)
On-chip timers
UNIX character processing
In-band Rx flow control
Special character Tx and recognition
Substantially reduced host CPU overhead means more channels and faster overall throughput.
No time-critical host software enables faster and easier software development.
CONTROLLER
INTERFACE
INTERFACE
Intelligent Two-Channel LAN and WAN Communications Controller — CD2231
ON-CHIP
LOGIC
LOGIC
HOST
BUS
DMA
AND
Features
FIRMWARE
ROM
5
(Revision D)
(Revision D)
(Revision D)
CD2231
256
PROPRIETARY
PROCESSOR
5-8
16
10
2
3,4
RISC
RAM
CD2401
134.4
5-8
16
10
4
MODEM
RECEIVE/CRC
TRANSMIT/CRC
TIMER/BRG/DPLL
MODEM
RECEIVE/CRC
TRANSMIT/CRC
TIMER/BRG/DPLL
(Revision D)
(Revision D)
(Revision D)
CD2431
134.4
5-8
16
10
4
Downloaded
Downloaded
Downloaded
Downloaded
Downloaded
Downloaded
Downloaded
Downloaded
Downloaded
CD2481
INTERFACE
CHANNELS
230.4
2 SERIAL
5-8
16
10
4
2
11

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