CD2231

Manufacturer Part NumberCD2231
DescriptionCD2231 Intelligent Two-channel Lan And Wan Communications Controller
ManufacturerIntel Corporation
CD2231 datasheet
 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
Page 121
122
Page 122
123
Page 123
124
Page 124
125
Page 125
126
Page 126
127
Page 127
128
Page 128
129
Page 129
130
Page 130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
Page 121/178

Download datasheet (3Mb)Embed
PrevNext
Intelligent Two-Channel LAN and WAN Communications Controller — CD2231
Bit 3
TxEn – Transmitter enabled status
When set, the transmitter is enabled.
When clear, the transmitter is disabled.
Bit 2
Reserved – must be ‘0’.
Bit 1
TFram – Transmit frame status
When set, a frame is being transmitted.
When clear, no frame is being transmitted.
Bit 0
TIdle – Transmitter idle status
When set, the transmitter output is idle.
When clear, the transmitter output is not idle.
Note that TFram and TIdle are mutually exclusive.
8.4.4
Modem Signal Value Registers (MSVR)
8.4.4.1
Modem Signal Value Register (MSVR-RTS)
Register Name: MSVR-RTS
Register Description: Modem Signal Value - RTS
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
DSR
CD
CTS
8.4.4.2
Modem Signal Value Register (MSVR-DTR)
Register Name: MSVR-DTR
Register Description: Modem Signal Value - DTR
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
DSR
CD
CTS
Either of these registers is read to determine the current input levels on the input modem pins. Note
that the pin definitions for these signals is negative true while the register values are positive true.
Two registers are provided for control of the outputs — DTR and RTS. Writing to the MSVR-DTR
register affects only the DTR pin. Writing to the MSVR-RTS register affects only the RTS pin.
Bit 7
DSR – Current state of data set ready input
Bit 6
CD – Current state of carrier detect input
Bit 5
CTS – Current state of clear to send input
Bit 4
DTR option – written by MSVR-DTR register
0 = value of DTR bit is output on TXCOUT/DTR* pin
1 = Transmit clock is output on TXCOUT/DTR* pin
Datasheet
Bit 4
Bit 3
Bit 2
DTRop
0
0
Bit 4
Bit 3
Bit 2
DTRop
0
0
Intel Hex Address: x’DC
Motorola Hex Address: x’DE
Bit 1
Bit 0
DTR
RTS
Intel Hex Address: x’DD
Motorola Hex Address: x’DF
Bit 1
Bit 0
DTR
RTS
121