CD2231

Manufacturer Part NumberCD2231
DescriptionCD2231 Intelligent Two-channel Lan And Wan Communications Controller
ManufacturerIntel Corporation
CD2231 datasheet
 
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Intelligent Two-Channel LAN and WAN Communications Controller — CD2231
8.5.1.2
Interrupt Enable Register (IER), Non-PPP Modes
Register Name: IER
Register Description: Interrupt Enable
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Mdm
0
RET
Bit 7
Modem pin change detect
Master interrupt enable for modem change detect functions. The host can select
which modem pins are monitored for input change and select either or both direc-
tions of change by programming the change detect option bits in COR4 and COR5.
A Group1-type interrupt (see LIVR description) is generated from this enable.
Bit 6
Reserved – must be ‘0’.
Bit 5
RET (Async)
In Asynchronous mode, this bit enables a Group 3 receive exception timeout inter-
rupt when a receive data timeout occurs with an empty receive FIFO. This provides
a mechanism for the host to manage a partially full receive buffer when receive data
stops.
Bit 4
Reserved – must be ‘0’.
Bit 3
Rx data
The receive FIFO threshold has been reached in Interrupt Transfer mode, causing a
Group 3 receive data interrupt. Any receive exception causes a Group 3 receive
exception interrupt.
Bit 2
Timer
General timer(s) timeout
In Synchronous mode, this bit enables a Group 1 interrupt when either timer reaches
zero.
Bit 1
Tx Mpty
Transmitter empty. If enabled, a Group 2 interrupt is generated when the channel is
completely empty of transmit data.
Bit 0
Tx Data
Any transmit exception or transmit FIFO threshold reached in Interrupt Transfer
mode. Group 2 interrupts are generated at the end of transmit DMA buffers or when
the FIFO threshold is reached in Interrupt Transfer mode.
8.5.1.3
Interrupt Enable Register (IER), PPP Mode
Register Name: IER
Register Description: Interrupt Enable
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Mdm
0
0
Datasheet
Bit 4
Bit 3
Bit 2
0
RxD
TIMER
Bit 4
Bit 3
Bit 2
0
RxD
TIMER
Intel Hex Address: x’12
Motorola Hex Address: x’11
Bit 1
Bit 0
TxMpty
TxD
Intel Hex Address: x’12
Motorola Hex Address: x’11
Bit 1
Bit 0
TxMpty
TxD
123