CD2231 Intel Corporation, CD2231 Datasheet - Page 3

• Manufacturer Part Number: CD2231
• Description: CD2231 Intelligent Two-channel Lan And Wan Communications Controller
• Manufacturer: Intel Corporation

Contents
1.0
2.0
3.0
4.0
5.0
Datasheet
Features
1.1
Conventions
Pin Information
3.1
3.2
3.3
Register Table
4.1
4.2
Functional Description
5.1
5.2
5.3
5.4
Intelligent Two-Channel LAN and WAN Communications Controller — CD2231
Benefits ...............................................................................................................11
Pin Diagram.........................................................................................................15
Pin Functions.......................................................................................................16
Pin Descriptions ..................................................................................................16
Memory Map .......................................................................................................20
4.1.1
4.1.2
4.1.3
4.1.4
4.1.5
4.1.6
4.1.7
4.1.8
Register Definitions .............................................................................................24
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
4.2.7
Host Interface ......................................................................................................34
5.1.1
5.1.2
Interrupts .............................................................................................................36
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
FIFO and Timer Operations ................................................................................41
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
DMA Operation....................................................................................................42
......................................................................................................................... 9
Global Registers.....................................................................................20
Option Registers.....................................................................................20
Bit Rate and Clock Option Registers......................................................21
Channel Command and Status Registers ..............................................22
Receive Interrupt Registers....................................................................22
Transmit Interrupt Registers...................................................................22
DMA Registers .......................................................................................23
Timer Registers ......................................................................................24
Global Registers.....................................................................................24
Option Registers.....................................................................................25
Bit Rate and Clock Option Registers......................................................27
Channel Command and Status Registers ..............................................28
Interrupt Registers..................................................................................29
DMA Registers .......................................................................................31
Timer Registers ......................................................................................33
Host Read and Write Cycles ..................................................................34
Byte and Word Transfers .......................................................................36
Contexts and Channels ..........................................................................37
Interrupt Registers..................................................................................37
Groups and Types..................................................................................38
Hardware Signals and IACK Cycles .......................................................39
Multi CD2231 Systems ...........................................................................40
Receive FIFO Operation ........................................................................41
Transmit FIFO Operation .......................................................................41
Timers ....................................................................................................41
Timers in Synchronous Protocols...........................................................42
Timers in Asynchronous Protocols.........................................................42
Transmit Timer .......................................................................................42
...............................................................................................................13
............................................................................................................20
..........................................................................................................15
...........................................................................................34
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