CD2231 Intel Corporation, CD2231 Datasheet - Page 57
CD2231
Manufacturer Part Number
CD2231
Description
CD2231 Intelligent Two-channel Lan And Wan Communications Controller
Manufacturer
Intel Corporation
Datasheet
1.CD2231.pdf
(178 pages)
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5.5
5.5.1
Datasheet
To retry the buffer from the failure point, the CPU should set the 2231own bit in the ARBSTS/
BRBSTS register. The CPU should not set the TermBuff bit when writing to REOIR at the end of
the interrupt, this causes the last transfer to be retried. Should a bus error occur again, the above
procedure is repeated. The CPU should check to ensure that a bad location is not continually
retried.
Bit Rate Generation and Data Encoding
BRG and DPLL Operation
Data clocks are generated in the CD2231 by feeding one of a number of clock sources into a
programmable divider. The clock source and divisor are separately programmable for each channel
and direction by the user. Clock options are programmed in the Transmit Clock Option and
Receive Clock Option registers. The divisors are programmed in the Transmit Bit Rate Period and
Receive Bit Rate Period registers. The possible clock sources are as following:
Transmit
Receive
The CLK input is nominally 33 MHz.
The divisor can be programmed for values from 1–255. To maximize the accuracy of edge
detection in Asynchronous and DPLL (digital phase locked loop) modes, select the highest
frequency clock and largest divisor combination.
An external clock input can be used and used as a multiple of the desired bit rate. If so, the
appropriate divisor value must be loaded into the Bit Rate Period register. If the external clock is at
the desired bit rate (1 clock), a value of 01h must be loaded into the associated Bit Rate Period
register.
1. Clk 0 – CLK input 8
2. Clk 1 – CLK input 32
3. Clk 2 – CLK input 128
4. Clk 3 – CLK input 512
5. Clk 4 – CLK input 2048
6. TXCIN pin
7. Receive bit clock
1. Clk 0 – CLK input 8
2. Clk 1 – CLK input 32
3. Clk 2 – CLK input 128
4. Clk 3 – CLK input 512
5. Clk 4 – CLK input 2048
6. RXCIN pin
Intelligent Two-Channel LAN and WAN Communications Controller — CD2231
57
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