CD2231 Intel Corporation, CD2231 Datasheet - Page 97

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CD2231

Manufacturer Part Number
CD2231
Description
CD2231 Intelligent Two-channel Lan And Wan Communications Controller
Manufacturer
Intel Corporation
Datasheet
Intelligent Two-Channel LAN and WAN Communications Controller — CD2231
8.2.4.3
SLIP Mode
Register Name: COR3
Register Description: Channel Option Register 3
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
Stop2
0
0
SLIP, MNP4, and Automatic In-Band Flow Control modes are only available on Revision B and
later devices.
Bit 7
Stop2
0 = 1 Stop bit
1 = 2 Stop bit
Bits 6:4
Reserved – must be ‘0’.
Bits 3:0
npad3, npad2, npad1, npad0 – Transmit frame leading pads
The number of character times preceding any frame transmission. A character time
is 10 bit times. All zeros in this field disables the leading pads.
npad3
8.2.4.4
Asynchronous Mode
Register Name: COR3
Register Description: Channel Option Register 3
Default Value: x’00
Access: Byte Read/Write
Bit 7
Bit 6
Bit 5
ESCDE
RngDE
FCT
Bit 7
ESCDE – Extended special character detect enable
0 = Special character detect for SCHR3 and SCHR4 is disabled.
1 = Special character detect for SCHR3 and SCHR4 is enabled; a special character
interrupt is generated following the receipt of a character matching SCHR3 or
SCHR4.
Bit 6
RngDE – Range detect enable
0 = Range detect disabled.
1 = Characters between SCRl and SCRh (inclusive) generate special character inter-
rupts.
Datasheet
Bit 4
Bit 3
0
npad3
npad2
npad1
0
0
0
0
0
0
0
0
1
1
1
1
Bit 4
Bit 3
SCDE
Splstp
Intel Hex Address: x’15
Motorola Hex Address: x’16
Bit 2
Bit 1
Bit 0
npad2
npad1
npad0
Number of
npad0
leading pads
0
0
1
1
0
2
1
15
Intel Hex Address: x’15
Motorola Hex Address: x’16
Bit 2
Bit 1
Bit 0
Stop2
Stop1
Stop0
97

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