MB88346L Fujitsu, MB88346L Datasheet - Page 3

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MB88346L

Manufacturer Part Number
MB88346L
Description
D/A Converter for Digital Tuning
Manufacturer
Fujitsu
Datasheet

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PIN DESCRIPTION
Pin No.
17
14
16
15
18
19
12
13
11
20
10
2
3
4
5
6
7
8
9
1
Symbol
AO
AO
AO
GND
CLK
AO
AO
AO
AO
AO
AO
AO
AO
AO
V
V
V
DO
LD
DI
CC
DD
SS
10
11
12
1
2
3
4
5
6
7
8
9
I/O
O
O
I
I
I
Serial address/data input to the internal 12-bit shift register: The
address/data format is that upper 4 bits (D11 to D8) indicate an
address and lower 8 bits (D7 to D0) indicate data. The D11 (MSB) is
the first-in bit and D0 (LSB) is the last-in bit.
Outputs MSB bit data from 12-bit shift register.
Shift clock input to the internal 12-bit shift register: At the rising edge
of CLK data on the DI pin is shifted into the LSB of the shift register
and contents of the shift register are shifted right (to the MSB).
Load strobe input for a 12-bit address/data: A high level on the LD pin
latches a 4-bit address (upper 4 bits: D11 to D8) of the internal 12-bit
shift register into the internal address decoder, and writes 8-bit data
(lower 8 bits: D7 to D0) of the shift register into an internal data latch
selected by the latched address.
8-bit D/A output pins with OP amps.
MCU interface and OP amp power supply pin.
MCU interface and OP amp ground pin.
D/A converter power supply pin.
D/A converter ground pin.
Function
MB88346L
3

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