TA235 ST Microelectronics, Inc., TA235 Datasheet

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TA235

Manufacturer Part Number
TA235
Description
Technical Article
Manufacturer
ST Microelectronics, Inc.
Datasheet
FIRMWARE HUB (FWH):
NEW GENERATION STORAGE FOR BIOS
James Lee
STMicroelectronics Inc.
Lexington, MA, USA
The traditional PC motherboard uses a chip-set
containing two controllers, called the North Bridge
and the South Bridge. Intel replaces these with the
Hub. In the Hub Architecture the two controllers
are connected to each other via a new Interlink
dedicated bus. This is a high-speed bus that has
twice the bandwidth of the PCI bus that works at
266 MBytes per second and resembles the new
point-to-point channel. The new Intel PC platforms
incorporate three primary components:
They use the Intel Hub Protocol that allows a
greater flow of information from the I/O controller
to the memory controller.
What is the Firmware Hub?
The Firmware Hub (FWH) is a flash memory
device for BIOS storage, based on Intel’s Low Pin
Count (LCP) Interface Specification. It eliminates
a redundant nonvolatile memory component and
is a fundamental part of the new generation PC
motherboards. It is the key to future security and
manageability of infrastructures for the PC
platform.
Firmware Hub Functional Description
The memory of the FWH is constructed in a
uniformed matrix array of 64 KByte blocks to allow
each block to be erased and reprogrammed
without affecting other blocks. For functional
October 2000
the Memory Control Hub (MCH),
the I/O Control Hub (ICH),
the Firmware Hub (FWH).
STMicroelectronics
Sandro D’Angelo
Catania, Italy
flexibility the FWH can be operated with two
different interfaces:
They are selected by the setting of the Interface
Configuration (IC) pin at V
mode and V
Figure 1. Firmware Hub Interface
Configuration
the Firmware Hub Interface (FWH) for
embedded operation
the Address/Address Multiplexed Interface (A/
A Mux) for programming operation during
manufacturing.
ID0-ID3
FGPI0-
FGPI4
FWH4
CLK
INIT
RP
IC
IH
TECHNICAL ARTICLE
4
5
for A/A Mux Interface mode.
M50FW040
V CC
V SS
V PP
IL
for FWH Interface
4
TA 235
FWH0-
FWH3
TBL
WP
AI03623
1/6

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TA235 Summary of contents

Page 1

FIRMWARE HUB (FWH): NEW GENERATION STORAGE FOR BIOS James Lee STMicroelectronics Inc. Lexington, MA, USA The traditional PC motherboard uses a chip-set containing two controllers, called the North Bridge and the South Bridge. Intel replaces these with the Hub. In ...

Page 2

TA 235 Figure 2. Firmware Hub Read Protocol CLK FWH4 FWH0-FWH3 START Number of 1 clock cycles Figure 3. Firmware Hub Write Protocol CLK FWH4 FWH0-FWH3 START Number of 1 clock cycles Firmware Hub Interface The FWH Interface features: a ...

Page 3

The software protection is a register based read and write protection in FWH interface mode. The registers can be altered to set the appropriate Locking to protect against piracy. Depending on the degree of protection required, the Lock Registers can ...

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TA 235 Figure 6. Address/Address Multiplexed Interface Write Protocol Write erase or program setup A0-A10 R1 tAVCL RC tWHWL tWLWH DQ0-DQ7 tPHWL RP The A/A Mux Interface bus operation is similar to a standard flash ...

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Figure 7. PLCC Connections A/A Mux DQ0 A/A Mux Figure 8. TSOP Connections A10 ...

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TA 235 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from ...

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