LM1291 National Semiconductor, LM1291 Datasheet - Page 3

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LM1291

Manufacturer Part Number
LM1291
Description
Video PLL System for Continuous-Sync Monitors
Manufacturer
National Semiconductor
Datasheet

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Electrical Characteristics
H Drive duty cycle control
gain
H Drive Phase control gain
PD1 Phase detector leakage current
a
H Drive low level output voltage
(Pin 20)
H Drive EN low level input voltage
(Pin 15)
H Drive EN high level input voltage
(Pin 15)
X-ray Shutdown threshold voltage
(Pin 16)
H HV Sync out
propagation delay change
Clamp Pulse width
Clamp Pulse Delay
Internal Ref voltage at pin 6
Note 1 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur
Note 2 Operating Ratings indicate conditions for which the device is functional but do not guarantee specific performance limits For guaranteed specifications
and test conditions see the Electrical Characteristics The guaranteed specifications apply only for the test conditions listed Some performance characteristics
may degrade when the device is not operated under the listed test conditions
Note 3 All voltages are measured with respect to GND unless otherwise specified
Note 4 The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any elevated temperature is P
this device T
Note 5 Human Body model 100 pF capacitor discharged through a 1 5 k
Note 6 Typicals are at T
Note 7 Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level)
Note 8 Measured with HP 53310A Modulation Domain Analyzer 50 ms sample window
Note 9 Phase limits
delay from the rising edge of H Drive to the FBP peak A positive phase value represents a phase lead of the FBP peak with reference to the leading edge of H
sync
VCO input bias current (Pin 28)
Jmax
Parameter
e
150 C The typical thermal resistance (
b
0 15
A
e
k
T
J
e
k
25 C and represent most likely parametric norm
0 35
b
t
DFB
T
H
DC input 0V– 4V 30%– 70%
allowed
(Note 9)
I
H Drive output active
H Drive output open (unlatched)
Above threshold
H Drive Output Open (Latched)
H HV in vs Comp Video in
(back porch) R
(back porch) R
(sync tip) R
(back porch) Trailing edge H HV Sync In
to leading edge clamp pulse
(sync tip) Leading edge H HV Sync In
to leading edge clamp pulse
No load
See Test Circuit (Figure 2) T
OL
expressed as a fraction of the horizontal period T
e
D
100 mA
e
JA
) of these parts when board mounted follow LM1291N 50 C W
(T
Jmax
SET
Conditions
SET
SET
b
e
T
A
15k V
resistor
e
e
)
3
JA
15k V
15k V
or the number given in the Absolute Maximum Ratings whichever is lower For
SET
SET
SET
e
A
e
4V
e
e
25 C V
0V
1 5V
Jmax
H
CC
where t
e
JA
0 025 T
(Note 6)
Typical
and the ambient temperature T
12V (Continued)
1 72
DFB
0 1
0 4
1 4
0 6
0 1
8 2
47
32
is the horizontal output transistor turn-off
H
(Note 7)
Limit
1 65
0 8
0 8
2 0
1 8
1
A
The maximum
V (max)
V (max)
V (min)
V (min)
V(max)
A (max)
Units
T
H
ns
V
s
V
s
s
s
s
V

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