74ALVCH16825DLG4 | |
|---|---|
| Manufacturer Part Number | 74ALVCH16825DLG4 |
| Description | IC BUFF/DVR TRI-ST 18BIT 56SSOP |
| Manufacturer | Texas Instruments |
| Series | 74ALVCH |
| 74ALVCH16825DLG4 datasheets |
|
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Specifications of 74ALVCH16825DLG4 | |||
|---|---|---|---|
| Logic Type | Buffer/Line Driver, Non-Inverting | Number Of Elements | 2 |
| Number Of Bits Per Element | 9 | Current - Output High, Low | 24mA, 24mA |
| Voltage - Supply | 1.65 V ~ 3.6 V | Operating Temperature | -40°C ~ 85°C |
| Mounting Type | Surface Mount | Package / Case | 56-SSOP |
| Logic Family | ALVC | Number Of Channels Per Chip | 18 |
| Polarity | Non-Inverting | Supply Voltage (max) | 3.6 V |
| Supply Voltage (min) | 1.65 V | Maximum Operating Temperature | + 85 C |
| Mounting Style | SMD/SMT | High Level Output Current | - 24 mA |
| Low Level Output Current | 24 mA | Minimum Operating Temperature | - 40 C |
| Number Of Lines (input / Output) | 18 / 18 | Output Type | 3-State |
| Propagation Delay Time | 3.9 ns at 2.7 V | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
PrevNext
SN74ALVCH16825
18-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES039D – JULY 1995 – REVISED OCTOBER 2004
PARAMETER MEASUREMENT INFORMATION
500
From Output
Under Test
C
= 50 pF
L
500
(see Note A)
LOAD CIRCUIT
Timing
1.5 V
Input
t
t
su
h
Data
1.5 V
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Input
1.5 V
t
PLH
Output
1.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NOTES: A. C
includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
D. The outputs are measured one at a time, with one transition per measurement.
E. t
and t
are the same as t
PLZ
PHZ
F. t
and t
are the same as t
PZL
PZH
G. t
and t
are the same as t
PLH
PHL
Figure 3. Load Circuit and Voltage Waveforms
8
V
= 2.7 V AND 3.3 V
0.3 V
CC
6 V
S1
Open
GND
Input
2.7 V
0 V
2.7 V
1.5 V
Output
0 V
Control
(low-level
enabling)
t
Output
2.7 V
Waveform 1
S1 at 6 V
1.5 V
(see Note B)
0 V
t
t
PHL
Output
V
Waveform 2
OH
1.5 V
S1 at GND
V
(see Note B)
OL
.
dis
.
en
.
pd
www.ti.com
TEST
S1
t
Open
pd
t
/t
6 V
PLZ
PZL
t
/t
GND
PHZ
PZH
t
w
2.7 V
1.5 V
1.5 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
2.7 V
1.5 V
1.5 V
0 V
t
PZL
PLZ
3 V
1.5 V
V
+ 0.3 V
OL
V
OL
t
PZH
PHZ
V
OH
V
0.3 V
OH
1.5 V
0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
10 MHz, Z
= 50 , t
2.5 ns, t
2.5 ns.
O
r
f
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