AT91FR40161 ATMEL Corporation, AT91FR40161 Datasheet

AT91FR40161

Manufacturer Part Number

AT91FR40161

Description

The AT91FR40161 Features 136 K Bytes of On-chip SRAM, 2M Bytes of Flash, an External Bus Interface, a 3-channel Timer/Counter, 2 ...

Manufacturer

ATMEL Corporation

Datasheet

1.AT91FR40161.pdf (153 pages)

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Features

•

Description

The AT91X40 Series is a subset of the Atmel AT91 16/32-bit microcontroller family,

which is based on the ARM7TDMI processor core. This processor has a high-perfor-

mance 32-bit RISC architecture with a high-density 16-bit instruction set and very low

power consumption. In addition, a large number of internally banked registers result in

very fast exception handling, making the device ideal for real-time control applications.

The AT91X40 Series features a direct connection to off-chip memory, including Flash,

through the fully programmable External Bus Interface (EBI). An eight-level priority

vectored interrupt controller, in conjunction with the Peripheral Data Controller signifi-

cantly improve the real-time performance of the device.

The devices are manufactured using Atmel’s high-density CMOS technology. By com-

bining the ARM7TDMI processor core with on-chip high-speed memory and a wide

range of peripheral functions on a monolithic chip, the Atmel AT91X40 Series is a fam-

ily of powerful microcontrollers that offer a flexible, cost-effective solution to many

compute-intensive embedded control applications.

Microcontroller

AT91M40800

AT91R40807

AT91M40807

AT91R40008

Incorporates the ARM7TDMI

On-chip SRAM and/or ROM

Fully Programmable External Bus Interface (EBI)

8-level Priority, Individually Maskable, Vectored Interrupt Controller

32 Programmable I/O Lines

3-channel 16-bit Timer/Counter

2 USARTs

Programmable Watchdog Timer

Advanced Power-saving Features

Available in a 100-lead TQFP Package

– High-performance 32-bit RISC Architecture

– High-density 16-bit Instruction Set

– Leader in MIPS/Watt

– Embedded ICE (In-Circuit Emulation)

– 32-bit Data Bus

– Single-clock Cycle Access

– Maximum External Address Space of 64M Bytes

– Up to 8 Chip Selects

– Software Programmable 8/16-bit External Databus

– 4 External Interrupts, Including a High-priority Low-latency Interrupt Request

– 3 External Clock Inputs

– 2 Multi-purpose I/O Pins per Channel

– 2 Dedicated Peripheral Data Controller (PDC) Channels per USART

– CPU and Peripheral Can be Deactivated Individually

Primary SRAM Bank

256K Bytes

8K Bytes

™

ARM

Thumb

Processor Core

Secondary SRAM Bank

128K Bytes

–

128K Bytes

ROM

–

AT91

ARM

Microcontrollers

AT91M40800

AT91R40807

AT91M40807

AT91R40008

Rev. 1354D–ATARM–08/02

Thumb

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