AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 108

• Manufacturer Part Number: AT94K05AL
• Description: Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
• Manufacturer: ATMEL Corporation

Example 3 – Multiply-
accumulate Operation
16-bit Multiplication
108
AT94K Series FPSLIC
The final example of 8-bit multiplication shows a multiply-accumulate operation. The general
formula can be written as:
Typical applications for the multiply-accumulate operation are FIR (Finite Impulse Response)
and IIR (Infinite Impulse Response) filters, PID regulators and FFT (Fast Fourier Transform).
For these applications the FMULS instruction is particularly useful. The main advantage of
using the FMULS instruction instead of the MULS instruction is that the 16-bit result of the
FMULS operation always may be approximated to a (well-defined) 8-bit format, see “Using
Fractional Numbers” on page 111.
The new multiply instructions are specifically designed to improve 16-bit multiplication. This
section presents solutions for using the hardware multiplier to do multiplication with 16-bit
operands.
Figure 60 schematically illustrates the general algorithm for multiplying two 16-bit numbers
with a 32-bit result (C = A • B). AH denotes the high byte and AL the low byte of the A operand.
CMH denotes the middle high byte and CML the middle low byte of the result C. Equal nota-
tions are used for the remaining bytes.
The algorithm is basic for all multiplication. All of the partial 16-bit results are shifted and
added together. The sign extension is necessary for signed numbers only, but note that the
carry propagation must still be done for unsigned numbers.
Figure 60. 16-bit Multiplication, General Algorithm
c n ( )
in
ldi
muls r19,r18
add
adc
=
r18,PINB ; Get the current pin value on port B
r19,b
r16,r0
r17,r1
a n ( ) b
×
+
c n 1
; r17:r16 = r18 * r19 + r17:r16
; Load constant b into r19
; r1:r0 = variable A * variable B
; r17:r16 += r1:r0
(
–
)
AH AL
+
+
+
=
(sign
(sign
CH
AH * BH
ext)
ext)
(sign ext)
CMH
AL * BH
AH * BL
X
BH BL
CML
AL * BL
CL
Rev. 1138F–FPSLI–06/02