AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 148

• Manufacturer Part Number: AT94K05AL
• Description: Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
• Manufacturer: ATMEL Corporation

PortE
148
AT94K Series FPSLIC
Table 45. DDDn
Note:
Figure 75. PortD Schematic Diagram
PortE is an 8-bit bi-directional I/O port with internal pull-up resistors.
Three I/O memory address locations are allocated for the PortE, one each for the Data Regis-
ter – PORTE, $07($27), Data Direction Register – DDRE, $06($26) and the PortE Input Pins –
PINE, $05($25). The PortE Input Pins address is read only, while the Data Register and the
Data Direction Register are read/write.
The PortE output buffers can sink 20 mA. As inputs, PortE pins that are externally pulled Low
will source current if the pull-up resistors are activated.
All PortE pins have alternate functions as shown in Table 46.
DDDn
0
0
1
1
PD*
(1)
1. n: 7,6...0, pin number
PULLUP
MOS
PORTDn
(1)
Bits on PortD Pins
0
1
0
1
(1)
Output
Output
Input
Input
RESET
I/O
DL
GTS
RP
Pull-up
DL
Yes
No
No
No
Comment
Tri-state (High-Z)
PDn will source current if
external pulled low (default)
Push-pull zero output
Push-pull one output
GTS: Global Tri-State
DL: Configuration Download
WL: Write PORTD
WD: Write DDRD
RL: Read PORTD Latch
RD: Read DDRD
RP: Read PORTD Pin
Q
Q
PORTD*
RESET
RESET
DDD*
WD
WL
RD
RL
Rev. 1138F–FPSLI–06/02
R
R
D
D