AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 149

• Manufacturer Part Number: AT94K05AL
• Description: Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
• Manufacturer: ATMEL Corporation

Rev. 1138F–FPSLI–06/02
Table 46. PortE Pins Alternate Functions Controlled by SCR and AVR I/O Registers
When the pins are used for the alternate function the DDRE and PORTE register has to be set
according to the alternate function description.
PortE Data Register – PORTE
PortE Data Direction Register – DDRE
PortE Input Pins Address – PINE
The PortE Input Pins address – PINE – is not a register, and this address enables access to
the physical value on each PortE pin. When reading PORTE, the PortE Data Latch is read,
and when reading PINE, the logical values present on the pins are read.
Bit
$07 ($27)
Read/Write
Initial Value
Bit
$06 ($26)
Read/Write
Initial Value
Bit
$05 ($25)
Read/Write
Initial Value
Port Pin
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
7
PINE7
R
Pull1
7
PORTE7
R/W
1
7
DDE7
R/W
0
Alternate Function
TX0
(UART0 transmit pin)
RX0
(UART0 receive pin)
TX1
(UART1 transmit pin)
RX1
(UART1 receive pin)
INT0
(external Interrupt0 input)
INT1
(external Interrupt0 input)
INT2
(external Interrupt0 input)
INT3
(external Interrupt0 input)
6
PINE6
R
Pull1
6
PORTE6
R/W
1
6
DDE6
R/W
0
5
PINE5
R
Pull1
5
PORTE5
R/W
1
5
DDE5
R/W
0
4
PORTE4
R/W
1
4
DDE4
R/W
0
4
PINE4
R
Pull1
Input
External Timer0 clock
-
-
-
External Timer1 clock
-
-
Input capture Counter1
3
PINE3
R
Pull1
3
PORTE3
R/W
1
3
DDE3
R/W
0
AT94K Series FPSLIC
2
PINE2
R
Pull1
2
PORTE2
R/W
1
2
DDE2
R/W
0
Output
-
Output compare
Timer0/PWM0
-
Output compare
Timer2/PWM2
-
Output compare
Timer1B/PWM1B
Output compare
Timer1A/PWM1A
1
PINE1
R
Pull1
1
PORTE1
R/W
1
1
DDE1
R/W
0
0
PINE0
R
Pull1
0
PORTE0
R/W
1
0
DDE0
R/W
0
PINE
PORTE
DDRE
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