AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 22
AT94K05AL
Manufacturer Part Number
AT94K05AL
Description
Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
Manufacturer
ATMEL Corporation
Datasheet
1.AT94K05AL.pdf
(192 pages)
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Program and
Data SRAM
22
AT94K Series FPSLIC
Up to 36 Kbytes of 15 ns dual-port SRAM reside between the FPGA and the AVR. This SRAM
is used by the AVR for program instruction and general-purpose data storage. The AVR is
connected to one side of this SRAM; the FPGA is connected to the other side. The port con-
nected to the FPGA is used to store data without using up bandwidth on the AVR system data
bus.
The FPGA core communicates directly with the data SRAM
ory space as 8-bit memory.
Note:
For the AT94K10 and AT94K40, the internal program and data SRAM is divided into three
blocks: 10 Kbytes x 16 dedicated program SRAM, 4 Kbytes x 8 dedicated data SRAM and 6
Kbytes x 16 or 12 Kbytes x 8 configurable SRAM, which may be swapped between program
and data memory spaces in 2 Kbytes x 16 or 4 Kbytes x 8 partitions.
For the AT94K05, the internal program and data SRAM is divided into three blocks: 4 Kbytes
16 dedicated program SRAM, 4 Kbytes x 8 dedicated data SRAM and 6 Kbytes x 16 or 12
Kbytes x 8 configurable SRAM, which may be swapped between program and data memory
spaces in 2 Kbytes x 16 or 4 Kbytes x 8 partitions.
The addressing scheme for the configurable SRAM partitions prevents program instructions
from overwriting data words and vice versa. Once configured (SCR41:40 – See “System Con-
trol Register – FPGA/AVR” on page 30.), the program memory space remains isolated from
the data memory space. SCR41:40 controls internal muxes. Write enable signals allow the
memory to be safely segmented. Figure 19 shows the FPSLIC configurable allocation SRAM
memory.
1. The unused bits for the FPGA-SRAM address must tie to ‘0’ because there is no pull-down
circuitry.
(1)
block, viewing all SRAM mem-
Rev. 1138F–FPSLI–06/02
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