AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 35
AT94K05AL
Manufacturer Part Number
AT94K05AL
Description
Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
Manufacturer
ATMEL Corporation
Datasheet
1.AT94K05AL.pdf
(192 pages)
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Instruction Set
Nomenclature
(Summary)
Status Register
(SREG)
Registers and
Operands
I/O Registers
Stack
Flags
Rev. 1138F–FPSLI–06/02
The complete “AVR Instruction Set” document is available on the Atmel web site, at
http://www.atmel.com/atmel/acrobat/doc0856.pdf.
SREG:
C:
Z:
N:
V:
S:
H:
T:
I:
Rd:
Rr:
R:
K:
k:
b:
s:
X,Y,Z:
A:
q:
STACK: Stack for return address and pushed registers
SP:
⇔:
0:
1:
-:
The instructions EIJMP, EICALL, ELPM, GPM, ESPM (from the megaAVR Instruction Set) are
not supported in the FPSLIC device.
Source register in the register file
Status register
Carry flag in status register
Zero flag in status register
Negative flag in status register
Two’s complement overflow indicator
N ⊕ V, For signed tests
Half-carry flag in the status register
Transfer bit used by BLD and BST instructions
Global interrupt enable/disable flag
Destination (and source) register in the register file
Result after instruction is executed
Constant data
Constant address
Bit in the register file or I/O register (0
Bit in the status register (0
Indirect address register (X = R27:R26, Y = R29:R28 and Z = R31:R30)
I/O location address
Displacement for direct addressing (0
Stack Pointer to STACK
Flag affected by instruction
Flag cleared by instruction
Flag set by instruction
Flag not affected by instruction
≤
s
≤
2)
≤
≤
q
b
AT94K Series FPSLIC
≤
≤
63)
7)
35
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