AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 73

• Manufacturer Part Number: AT94K05AL
• Description: Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
• Manufacturer: ATMEL Corporation

On-chip Debug
Specific JTAG
Instructions
IEEE 1149.1
(JTAG)
Boundary-scan
Features
System Overview
Rev. 1138F–FPSLI–06/02
The On-Chip debug support is considered being private JTAG instructions, and distributed
within ATMEL and to selected third-party vendors only. Table 16 lists the instruction opcode.
Table 16. JTAG Instruction and Code
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The Boundary-Scan chain has the capability of driving and observing the logic levels on the
AVR’s digital I/O pins. At system level, all ICs having JTAG capabilities are connected serially
by the TDI/TDO signals to form a long shift register. An external controller sets up the devices
to drive values at their output pins, and observe the input values received from other devices.
The controller compares the received data with the expected result. In this way, Boundary-
Scan provides a mechanism for testing interconnections and integrity of components on
Printed Circuits Boards by using the 4 TAP signals only.
The four IEEE 1149.1 defined mandatory JTAG instructions IDCODE, BYPASS, SAM-
PLE/PRELOAD, and EXTEST, as well as the AVR specific public JTAG instruction
AVR_RESET can be used for testing the Printed Circuit Board. Initial scanning of the data reg-
ister path will show the ID-code of the device, since IDCODE is the default JTAG instruction. It
may be desirable to have the AVR device in reset during test mode. If not reset, inputs to the
device may be determined by the scan operations, and the internal software may be in an
JTAG Instruction
EXTEST
IDCODE
SAMPLE_PRELOAD
RESERVED
PRIVATE
PRIVATE
PRIVATE
RESERVED
PRIVATE
PRIVATE
PRIVATE
PRIVATE
AVR_RESET
RESERVED
RESERVED
BYPASS
JTAG (IEEE std. 1149.1 compliant) Interface
Boundary-scan Capabilities According to the JTAG Standard
Full Scan of All Port Functions
Supports the Optional IDCODE Instruction
Additional Public AVR_RESET Instruction to Reset the AVR
4-bit Code
$D (1101)
$A (1010)
$B (1011)
$C (1100)
$E (1110)
$F (1111)
$0 (0000)
$1 (0001)
$2 (0010)
$3 (0011)
$4 (0100)
$5 (0101)
$6 (0110)
$7 (0111)
$8 (1000)
$9 (1001)
Selected Scan Chain
AVR I/O Boundary
Device ID
AVR I/O Boundary
N/A
FPSLIC On-chip Debug System
FPSLIC On-chip Debug System
FPSLIC On-chip Debug System
N/A
FPSLIC On-chip Debug System
FPSLIC On-chip Debug System
FPSLIC On-chip Debug System
FPSLIC On-chip Debug System
AVR Reset
N/A
N/A
Bypass
AT94K Series FPSLIC
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