AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 97

• Manufacturer Part Number: AT94K05AL
• Description: Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
• Manufacturer: ATMEL Corporation

Rev. 1138F–FPSLI–06/02
Timer/Counter1 Control Register A – TCCR1A
• Bits 7,6 - COM1A1, COM1A0: Compare Output Mode1A, Bits 1 and 0
The COM1A1 and COM1A0 control bits determine any output pin action following a compare
match in Timer/Counter1. Any output pin actions affect pin OC1A – Output CompareA pin
PE6. This is an alternative function to an I/O port, and the corresponding direction control bit
must be set (one) to control an output pin. The control configuration is shown in Table 26.
• Bits 5,4 - COM1B1, COM1B0: Compare Output Mode1B, Bits 1 and 0
The COM1B1 and COM1B0 control bits determine any output pin action following a compare
match in Timer/Counter1. Any output pin actions affect pin OC1B – Output CompareB pin
PE5. This is an alternative function to an I/O port, and the corresponding direction control bit
must be set (one) to control an output pin. The following control configuration is given:
Table 26. Compare 1 Mode Select
Notes:
• Bit 3 - FOC1A: Force Output Compare1A
Writing a logic 1 to this bit forces a change in the compare match output pin PE6 according to
the values already set in COM1A1 and COM1A0. If the COM1A1 and COM1A0 bits are written
in the same cycle as FOC1A, the new settings will not take effect until next compare match or
forced compare match occurs. The Force Output Compare bit can be used to change the out-
put pin without waiting for a compare match in the timer. The automatic action programmed in
COM1A1 and COM1A0 happens as if a Compare Match had occurred, but no interrupt is gen-
erated and it will not clear the timer even if CTC1 in TCCR1B is set. The FOC1A bit will always
be read as zero. The setting of the FOC1A bit has no effect in PWM mode.
• Bit 2 - FOC1B: Force Output Compare1B
Writing a logic 1 to this bit forces a change in the compare match output pin PE5 according to
the values already set in COM1B1 and COM1B0. If the COM1B1 and COM1B0 bits are written
in the same cycle as FOC1B, the new settings will not take effect until next compare match or
forced compare match occurs. The Force Output Compare bit can be used to change the out-
put pin without waiting for a compare match in the timer. The automatic action programmed in
COM1B1 and COM1B0 happens as if a Compare Match had occurred, but no interrupt is gen-
erated. The FOC1B bit will always be read as zero. The setting of the FOC1B bit has no effect
in PWM mode.
Bit
$2F ($4F)
Read/Write
Initial Value
COM1X1
0
0
1
1
1. In PWM mode, these bits have a different function. Refer to Table 30 for a detailed
2. X = A or B
(2)
description.
7
COM1A1
R/W
0
COM1X0
0
1
0
1
6
COM1A0
R/W
0
(2)
Description
Timer/Counter1 disconnected from output pin OC1X
Toggles the OC1X output line
Clears the OC1X output line (to zero)
Sets the OC1X output line (to one)
5
COM1B1
R/W
0
(1)
4
COM1B0
R/W
0
3
FOC1A
R/w
0
AT94K Series FPSLIC
2
FOC1B
R/W
0
1
PWM11
R/W
0
0
PWM10
R/W
0
TCCR1A
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