ICE1232 IC Ensemble, ICE1232 Datasheet - Page 23

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ICE1232

Manufacturer Part Number
ICE1232
Description
ac 97 2.1 VSR Audio Codec With 3D
Manufacturer
IC Ensemble
Datasheet

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Preliminary
Note:
AMAP
VRA
Extended Audio Status/Control Register(Index 2Ah)
VRA
PCM DAC Sample Rate Register (Index 2Ch)
SR[15:0]
PCM ADC Sample Rate Register (Index 32h)
SR[15:0]
Rev. 1.5, 1/10/00
Table 19. Multiple Codec Mode Status Bits
SR15 SR14 SR13 SR12 SR11 SR10
SR15 SR14 SR13 SR12 SR11 SR10
D15
D15
D15
ID1
0
0
1
1
D14
D14
D14
codec via pins 45 and 46, use the inverse values. Please, refer to Figure 11 on page 25. Digital Controllers may support up to
four DATA_IN pins to support one primary and three secondary codecs. BIT_CLK is an output for the primary codec and an
input pin for the controller and secondary codecs. ID[1:0] pins with internal pull-up resistors defaults codec as primary codec
The state of the ID pins is reported in reverse polarity on register 28h, bits D15 and D14. If you use Table 16 to configure the
D13
D13
D13
One primary and a maximum of three secondary codecs may be supported as an option.
Slot/DAC mapping based on Codec ID
“1” :
Variable Sampling Rate PCM Audio
“1” :
D12
Variable Sampling Rate Mode control
“1” :
“0” :
D12
DAC Sample Rate (in Hz)
16-bit unsigned value representing the sample rate in 1Hz resolution. The default value is
48kHz (48000 = BB80h).
D12
ADC Sample Rate (in Hz)
16-bit unsigned value representing the sample rate in 1Hz resolution. The default value is
48kHz (48000 = BB80h).
ID0
0
1
0
1
D11
D11
D11
Feature implemented in compliance to AC ‘97 2.1 Appendix D
Feature implemented in compliance to AC ‘97 2.1 Appendix A
Enable VSR
Fixed 48kHz sampling rate
D10
D10
D10
Primary Codec (default)
SR9
SR9
D9
D9
D9
Secondary Codec 1
Secondary Codec 2
Secondary Codec 3
Codec Mode
SR8
SR8
D8
D8
D8
SR7
SR7
D7
D7
D7
SR6
SR6
D6
D6
D6
SR5
SR5
D5
D5
D5
SR4
SR4
D4
D4
D4
SR3
SR3
D3
D3
D3
SR2
SR2
D2
D2
D2
SR1
SR1
D1
D1
D1
ICE1232
VRA
SR0
SR0
D0
D0
D0
Default
Default
Default
BB80h
BB80h
0000h
23
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