ICE1232 IC Ensemble, ICE1232 Datasheet - Page 26

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ICE1232

Manufacturer Part Number
ICE1232
Description
ac 97 2.1 VSR Audio Codec With 3D
Manufacturer
IC Ensemble
Datasheet

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Power Management
The ICE1232 may be placed in several power down states using the power down control bits located in index
register 26h. Table 20 lists the power down states accessible through this register.
Note:
Complete power down of the AC ’97 device is achieved by sequential writes to the Power Down and Status
Control Register (Index 26h) as follows:
26
Table 20. Power Down Mode Bits
PR0
PR1
PR2
PR3
PR4
PR5
PR6
Bit
values). Power Down and Status register (index 26h) read action verifies stability before power down write action occurs.
Registers maintain values in sleep mode (PR4 write) and wake up with a warm reset (register values) or a cold reset (default
Function
ADC and Mux Powerdown
DAC Powerdown
Mixer Powerdown (V
Mixer Powerdown (V
AC Link Powerdown (BIT_CLK off)
Internal Clock Disabled
Alternate Line Out Powerdown
Normal
Normal Operations:
ADC’s and Input Mux:
DAC’s:
Analog Mixer:
V
AC-link:
Internal Clocks:
Alt. Line Out:
REFOUT
PR0=1
Figure 12. AC’97 Power Down / Power Up Procedure
ADC=1
PR0=0
&
Note: In this example, the Analog Mixer has been disabled, but V
ADC’s OFF
:
PR0
REF
REF
Ready=1
on)
off)
PR1=1
DAC=1
PR1=0
&
DAC’s OFF
PR1
ANL=1
PR2=1
PR2=0
Default
PR[6:0] = 00h
PR0 = 1 (write)
PR1 = 1 (write)
PR2 = 1 (write)
PR3 = 1 (write)
PR4 = 1 (write)
PR5 = 1 (write)
PR6 = 1 (write)
&
Analog OFF
PR2 / PR3
PR4=1
Cold Reset
Warm Reset
Digital I/F
OFF
PR4
REF
is still on.
Shut Off
Preliminary
Rev. 1.5, 1/10/00

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