SC4520 Semtech Corporation, SC4520 Datasheet - Page 9

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SC4520

Manufacturer Part Number
SC4520
Description
3A Step-Down Switching Regulator
Manufacturer
Semtech Corporation
Datasheet
www.DataSheet4U.com
Thermal Considerations
There are three major power dissipation sources for the
SC4520. The internal switch conduction loss, its switching
loss due to the high frequency switching actions and the
base drive boost circuit loss. These losses can be
estimated as:
Where:
I
R
V
connection.
The junction temperature of the SC4520 can be
further determined by:
Its value is a function of the IC package, the application
layout and the air cooling system.
The freewheeling diode also contributes a significant
portion of the total converter loss. This loss should be
minimized to increase the converter efficiency by using
Schottky diodes with low forward drop (V
Loop Compensation Design
The SC4520 has an internal error amplifier and requires
a compensation network to connect between the COMP
pin and GND pin as shown in Figure 3. The compensation
network includes C4, C5 and R3. R1 and R2 are used to
program the output voltage according to:
Assuming the power stage ESR (equivalent series
resistance) zero is an order of magnitude higher than
the closed loop bandwidth, which is typically one tenth of
the switching frequency, the power stage control to output
transfer function with the current loop closed (Ridley
model) for the SC4520 will be as follows:
POWER MANAGEMENT
Application Information (Cont.)
O
BOOST
on
2006 Semtech Corp.
P
JA
= load current;
total
= on-equivalent resistance of the switch;
is the thermal resistance from junction to ambient.
= input voltage or output based on the boost circuit
I
o
2
R
on
D
P
T
diode
J
10.8
G
V
VD
T
O
A
(s)
V
10
F
1
θ
2 .
JA
I
o
1
3
(1
4.3
1 (
P
I
o
total
R
D)
L
R
V
R
R
s
1
I
2
1
L
C
)
1000
10
F
).
I
o
D
(V
boost
)
9
Where:
R
C – Output capacitor.
The goal of the compensation design is to shape the loop
to have a high DC gain, high bandwidth, enough phase
margin, and high attenuation for high frequency noises.
Figure 3 gives a typical compensation network which
offers 2 poles and 1 zero to the power stage:
Figure 3. Compensation network provides 2 poles and
1 zero.
The compensation network gives the following
characteristics:
Where:
The loop gain will be given by:
Where:
T(s)
L
– Load and
2
2
2
2
5
5
8
8
EN
EN
EN
EN
FSET
FSET
G
IN
IN
IN
IN
COMP
1
1
4
4
(s)
SC4520
SC452
SC4520
SC452
COMP
COMP
COMP
COMP
G
SW
SW
SW
SW
FB
FB
FB
FB
COMP
G
VD
3
3
3
3
6
6
7
7
C5
C5
C5
C5
(s)
(s)
3.655
ω
ω
P2
1
ω
ω
R3
R3
R3
R3
ω
C4
C4
C4
C4
1
Z
p1
s
10
R
1
(1
C
R
C
3
3
R
4
3
4
ω
C
R
C
L
1
D2
D2
D2
D2
s
ω
1
1
Z
L
C
4
s
4
C
P2
C
C
4
5
L1
L1
L1
L1
C
R
5
)
1
5
R
g
R2
R2
R2
R2
R1
R1
R1
R1
2
m
R
2
R
1
s
C
C
C
C
1
R
(1
SC4520
www.semtech.com
2
R
2
ω
s
P1
Vout
Vout
1
)
ω
(1
s
Z
ω
s
P2
)

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