TEA7650H Philips Semiconductors, TEA7650H Datasheet - Page 8

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TEA7650H

Manufacturer Part Number
TEA7650H
Description
Video signal processor for CD-video/laser vision
Manufacturer
Philips Semiconductors
Datasheet
Philips Semiconductors
frequency.The phase of the line synchronization pulses
(CS1, pin 2) can be used to control the speed of the
turntable motor.
However, with this method it is not possible to obtain an
acceptable reduction of timing errors for frequencies of
25 Hz and above. To reduce errors, use is made of an
external Electronic Time Base Corrector (ETBC) between
pins 27 and 31 which functions as a variable delay line
driven by an error signal.
This error signal can be extracted from the output signal
CS1 (pin 2), CHR1 (pin 48), CS2 (pin 46) and CHR2
(pin 44).
Since the line sync pulses (CS1) are not suitable to
achieve an accurate enough measurement of time
difference, use is made of the 3.58 MHz burst signal
derived from the chrominance signal CHR1. If the same
zero crossing of the burst signal is used in every line, the
actual time can be measured with sufficient accuracy.
The CVBS signal leaving the ETBC might still have small
timing errors due to residual control error. A second
(feedback) loop is therefore required. The CVBS signal is
fed into an AGC circuit (pin 31) that compensates for gain
tolerances in the ETBC. As in the first loop, the line
synchronization pulses (CS2) and the chrominance signal
(CHR2) are derived from the CVBS signal by using second
sync and chrominance separators. The error signal
obtained by comparison in this feedback loop is added to
the error signal obtained in the first loop.
Using the burst signal for accurate measurements is a
problem in the PAL format due to its alternating phase.
A special 3.75 MHz (240 fh) burst has therefore been
added to the video signal recorded on the PAL disk. This
burst is inserted on the top level of the line sync pulses.
In dual standard applications, the resonant circuits of the
chrominance separators (pins 1 and 45) should be tuned
to 3.67 MHz to ensure good separation of the special burst
or the chrominance subcarrier.
When the timebase-corrected CVBS signal has by-passed
the second sync and chrominance separators, it reaches
the special burst suppressor which removes the special
burst. The signal is then fed into the noise reduction circuit.
Noise reduction
A noise reduction circuit can be used to improve the
apparent picture quality of a noisy signal. It operates as
follows: First the timebase corrected CVBS signal is
buffered (pin 33) and then fed into an external network
which removes the chrominance subcarrier and all
September 1990
Video signal processor for CD-video/laser vision
8
low-frequency components. It is then fed into a limiter
(pin 35) which ensures that only small amplitudes (mainly
noise) are removed from the main signal.
The chrominance subcarrier trap is switched to either the
PAL subcarrier frequency (4.43 MHz) or the NTSC
subcarrier (3.58 MHz) by the PAL/NTSC system selector
(pin 37) using the additional small capacitor at pin 34. An
external resistor at pin 36 is included so that
manufacturers can select their preferred level of noise
reduction, or none at all, by grounding the pin.
Picture insertion
The CVBS signal containing the information to be
displayed is applied to pin 40. A clamp circuit ensures that
the black level of this signal is the same as that of the main
signal. Both signals are applied to the insertion switch.
When, for example, a character is to be displayed the 6 dB
attenuation (pin 39) is first activated to generate a reduced
contrast background area around the character (with
respect to the black level so that the original picture is still
visible). Next, the insertion switch (pin 38) is activated and
the character appears at the output. By switching back to
the original picture, the procedure operates in the reverse
sequence.
Other examples of the picture insertion facility are
displaying a background picture during start-up of the
video disk player or the use of picture-in-picture.
A buffer is provided at the CVBS output (pin 42) which
delivers a CVBS signal clamped to black level and
controlled to a peak-to-peak amplitude of 1 V.
Reference voltage
A reference voltage of 1.6 V is provided by a bandgap
circuit. Internally, all control circuits are supplied with this
reference voltage. Externally, it can be used for various
purposes.
Preliminary specification
TEA7650H

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