MT29F8G08FABWP Micron Technology, Inc, MT29F8G08FABWP Datasheet - Page 15

• Manufacturer Part Number: MT29F8G08FABWP
• Manufacturer: Micron Technology, Inc

Figure 10:
Table 5:
09005aef818a56a7 pdf/ 09005aef81590bdd source
2gb_nand_m29b__2.fm - Rev. H 9/05 EN
Cycle
First
Second
Third
Fourth
Fifth
Cache Register
Data Register
4,096 blocks
per device
Array Addressing: MT29F4G16BxB
CAx = column address; RAx = row address.
I/O[15:8]
Array Organization for MT29F4G16BxB (x16)
LOW
LOW
LOW
LOW
LOW
Notes: 1. Die address boundary: 0 = 0 – 2Gb, 1 = 2Gb – 4Gb.
RA18
RA26
LOW
LOW
2. I/O[15:8] are not used during the addressing sequence and should be driven LOW.
I/O7
CA7
RA17
RA25
LOW
LOW
1,024
1,024
I/O6
CA6
1 Block
2, 4, and 8Gb x8/x16 Multiplexed NAND Flash Memory
1,056 words
RA16
RA24
LOW
LOW
I/O5
CA5
15
32
32
RA15
RA23
LOW
LOW
I/O4
CA4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
64 pages = 1 block
1 page
1 block
1 device = (1K + 32) words x 64 pages
RA14
RA22
LOW
LOW
I/O3
CA3
I/O 15
I/O 0
= (1K + 32) words
= (1K + 32) words x 64 pages
= (64K + 2K) words
= 4,224 Mb
x 4,096 blocks
(64K + 2K) words
CA10
RA13
RA21
LOW
I/O2
CA2
©2004 Micron Technology, Inc. All rights reserved.
RA28
RA12
RA20
I/O1
CA1
CA9
1
Addressing
RA11
RA19
RA27
I/O0
CA0
CA8