MT29F8G08FABWP Micron Technology, Inc, MT29F8G08FABWP Datasheet - Page 31

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MT29F8G08FABWP

Manufacturer Part Number
MT29F8G08FABWP
Description
Manufacturer
Micron Technology, Inc
Datasheet

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PROGRAM Operations
PROGRAM PAGE 80h–10h
SERIAL DATA INPUT 80h
RANDOM DATA INPUT 85h
Figure 22:
Figure 23:
09005aef818a56a7 pdf/ 09005aef81590bdd source
2gb_nand_m29b__2.fm - Rev. H 9/05 EN
PROGRAM and READ STATUS Operation
RANDOM DATA INPUT
Micron NAND Flash devices are inherently page-programmed devices. Within a block,
the pages must be programmed consecutively from the least significant bit (LSB) page of
the block to most significant bit (MSB) pages of the block. Random page address pro-
gramming is prohibited.
Micron NAND flash devices also support partial-page programming operations. This
means that any single bit can only be programmed one time before an erase is required;
however, the page can be partitioned such that a maximum of eight programming oper-
ations are allowed before an erase is required.
PAGE PROGRAM operations require loading the SERIAL DATA INPUT (80h) command
into the command register, followed by five ADDRESS cycles, then the data. Serial data
is loaded on consecutive WE# cycles starting at the given address. The PROGRAM (10h)
command is written after the data input is complete. The internal write state machine
automatically executes the proper algorithm and controls all the necessary timing to
program and verify the operation. Write verification only detects “1s” that are not suc-
cessfully written to “0s.”
R/B# goes LOW for the duration of array programming time,
REGISTER (70h) command and the RESET (FFh) command are the only commands valid
during the programming operation. Bit 6 of the status register will reflect the state of
R/B#. When the device reaches ready, read bit 0 of the status register to determine if the
program operation passed or failed. (See Figure 22.) The command register stays in read
status register mode until another valid command is written to it.
After the initial data set is input, additional data can be written to a new column address
with the RANDOM DATA INPUT (85h) command. The RANDOM DATA INPUT com-
mand can be used any number of times in the same page prior to issuing the PAGE
WRITE (10h) command. See Figure 23 for the proper command sequence.
R/B#
R/B#
I/Ox
I/Ox
80h
80h
Address (5 Cycles)
Address (5 Cycles)
2, 4, and 8Gb x8/x16 Multiplexed NAND Flash Memory
D
IN
D
IN
85h
31
10h
Address (2 Cycles)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t PROG
D
IN
10h
70h
t PROG
Command Definitions
t
I/O 0 = 0 PROGRAM successful
I/O 0 = 1 PROGRAM error
PROG. The READ STATUS
©2004 Micron Technology, Inc. All rights reserved.
Status
70h
Status

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