MT29F8G08FABWP Micron Technology, Inc, MT29F8G08FABWP Datasheet - Page 33

• Manufacturer Part Number: MT29F8G08FABWP
• Manufacturer: Micron Technology, Inc

Internal Data Move
READ FOR INTERNAL DATA MOVE 00h–35h
INTERNAL DATA MOVE 85h–10h
09005aef818a56a7 pdf/ 09005aef81590bdd source
2gb_nand_m29b__2.fm - Rev. H 9/05 EN
An internal data move requires two command sequences. Issue a READ for INTERNAL
DATA MOVE (00h–35h) command first, then the INTERNAL DATA MOVE (85h–10h)
command. Data moves are only supported within the die from which data is read.
This READ command is used in conjunction with the INTERNAL DATA MOVE (85h–
10h) command. First, (00h) is written to the command register, then the internal source
address is written (five cycles). After the address is input, the READ for INTERNAL DATA
MOVE (35h) command writes to the command register. This transfers a page from
memory into the cache register.
The written column addresses are ignored even though all five ADDRESS cycles are
required.
The memory device is now ready to accept the INTERNAL DATA MOVE (85h–10h) com-
mand. Please refer to the description of this command in the following section.
After the READ for INTERNAL DATA MOVE command has been issued and R/B# goes
HIGH, the INTERNAL DATA MOVE command can be written to the command register.
This command transfers the data from the cache register to the data register and program-
ming of the new destination page begins. After the INTERNAL DATA MOVE command
and address sequence are written to the device, R/B# goes LOW while the internal con-
trol logic automatically programs the new page. The READ STATUS command and bit 6
of the status register can be used instead of the R/B# line to determine when the write is
complete. Bit 0 of the status register indicates if the operation was successful.
The RANDOM DATA INPUT (85h) command can be used during the INTERNAL DATA
MOVE command sequence to modify a word or multiple words of the original data.
First, data is copied into the cache register using the 00h–35h command sequence, then
the RANDOM DATA INPUT (85h) command is written along with the address of the data
to be modified next. New data is input on the external data pins. This copies the new
data into the cache register.
When 10h is written to the command register, the original data plus the modified data is
transferred to the data register, and programming of the new page is started. The RAN-
DOM DATA INPUT command can be issued as many times as necessary before starting
the programming sequence with 10h. (See Figures 25 and 26 on page 34.)
Because the INTERNAL DATA MOVE operation does not utilize external memory, ECC
cannot be used to check for errors before programming the data to a new page. This can
lead to a data error if the source page contains a bit error due to charge loss or charge
gain. In the case that multiple INTERNAL DATA MOVE operations are performed, these
bit errors may accumulate without correction. For this reason, it is highly recommended
that systems utilizing the INTERNAL DATA MOVE operation use a robust ECC scheme
that can correct two or more bits per sector.
2, 4, and 8Gb x8/x16 Multiplexed NAND Flash Memory
33
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Command Definitions
©2004 Micron Technology, Inc. All rights reserved.