74F646BSC Fairchild Semiconductor, 74F646BSC Datasheet

IC BUS TRANSCVR 3-ST 8BIT 24SOIC

74F646BSC

Manufacturer Part Number
74F646BSC
Description
IC BUS TRANSCVR 3-ST 8BIT 24SOIC
Manufacturer
Fairchild Semiconductor
Series
74Fr
Datasheet

Specifications of 74F646BSC

Logic Type
Transceiver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
15mA, 64mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 2000 Fairchild Semiconductor Corporation
74F646SC
74F646MSA
74F646SPC
74F646BSC
74F646BSPC
74F648SC
74F648SPC
74F646 • 74F646B • 74F648
Octal Transceiver/Register with 3-STATE Outputs
General Description
These devices consist of bus transceiver circuits with
3-STATE, D-type flip-flops, and control circuitry arranged
for multiplexed transmission of data directly from the input
bus or from the internal registers. Data on the A or B bus
will be clocked into the registers as the appropriate clock
pin goes to a high logic level. Control G and direction pins
are provided to control the transceiver function. In the
transceiver mode, data present at the high impedance port
may be stored in either the A or the B register or in both.
The select controls can multiplex stored and real-time
(transparent mode) data. The direction control determines
which bus will receive data when the enable control G is
Active LOW. In the isolation mode (control G HIGH), A data
may be stored in the B register and/or B data may be
stored in the A register.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Order Number
Package Number
MSA24
M24B
N24C
M24B
N24C
M24B
N24C
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DS009580
Features
Independent registers for A and B buses
Multiplexed real-time and stored data
74F648 has inverting data paths
74F646/74F646B have non-inverting data paths
74F646B is a faster version of the 74F646
3-STATE outputs
300 mil slim DIP
Package Description
March 1988
Revised October 2000
www.fairchildsemi.com

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74F646BSC Summary of contents

Page 1

... MSA24 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74F646SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 74F646BSC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F646BSPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide ...

Page 2

Logic Symbols 74F646/74F646B IEEE/IEC 74F646/74F646B Connection Diagrams 74F646/74F646B www.fairchildsemi.com 74F648 IEEE/IEC 74F648 74F648 2 ...

Page 3

Unit Loading/Fan Out Pin Names Description A –A Data Register A Inputs 3-STATE Outputs B –B Data Register B Inputs 3-STATE Outputs CPAB, CPBA Clock Pulse Inputs SAB, SBA Select Inputs G Output Enable Input DIR ...

Page 4

Logic Diagrams Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Please note that this diagram is provided only for the understanding of logic operations and ...

Page 5

Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 3) Input Current (Note 5.0 mA Voltage Applied to Output in HIGH State ...

Page 6

AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PLH t Clock to Bus PHL t Propagation Delay PLH t Bus to Bus (74F646) PHL t Propagation Delay PLH t Bus to Bus (74F648) PHL t ...

Page 7

AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PLH t Clock to Bus PHL t Propagation Delay PLH t Bus to Bus PHL t Propagation Delay PLH t SBA or SAB ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M24B Package Number MSA24 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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