HA118144AF ETC, HA118144AF Datasheet
HA118144AF
Related parts for HA118144AF
HA118144AF Summary of contents
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... HA118144AF Video Camera CDS/AGC IC Description The HA118144AF bipol ar IC that wa s developed to perform the analog signal processing between the CCD and the ADC in a CCD camera, and is optimal for use in CCD camera digital signal processing systems. Functions • Correlated double sampling • ...
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... HA118144AF Pin Arrangement NC 1 KNP 2 CND4 CLM CLM 8 SO2 9 SO1 10 GND9 HA118144AF SIN FB1 32 V CC1 31 V CC2 30 V AGC 29 SOA1 28 SIA2 27 V FB2 S/N HA118144AF (top view) ...
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... AGC DAC bias circuit. Connect to GND through a 0.1 µF capacitor. Power supply +5 V BLK 5V Base Blanking pulse input. The PP signal output is clipped at the BLK level when a low level is input. OBP Optical black pulse input. PP signal The feedback clamp operates when a high level is input. HA118144AF 3 ...
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... Power supply +5 V Power supply + Base AGC1 feedback output. Connect to GND through a 0.1 µF capacitor. Video 115 mV to Base Signal input from the CCD PP 380 mV sensor Gain select bias voltage output. Connect to GND through a 0.1 µF capacitor. GND = 0 V HA118144AF ...
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... Field through period clamp PP pulse. Duty = 25%, phase difference = 180° (with respect to SP2). DC 2.46 mA Bias current pin for internal logic circuits. Leave open. Pulse Serial data input pin PP Pulse Serial clock pin. Period µ µs. HA118144AF 5 ...
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... HA118144AF Block Diagram 6 HA118144AF ...
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... HA118144AF I/O Pin Equivalent Circuits 200 HA118144AF 7 ...
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... This IC is for use in consumer products. It should not be used in industrial products products that will be used outdoors for extended periods. 8 Symbol Rated Value V 6.0 CC5 Max V 10.0 CC9 Max T –10 to +75 opr T –55 to +125 stg V 4.75 to 5.25 OP5 V 8.5 to 9.5 OP9 P 440 T 1.5 mm HA118144AF Unit V V °C ° ...
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... HA118144AF Appli- cable Test Conditions Pins 20, 31 FBC on – V VFB max VFB min FBC on – V SIA2 SIA2 min 42 pin 0 VDC ...
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... Adjusts the pin 46 TH and 47 serial data amplitudes. 22, 41, 42 pin 5 VDC –0.8 –0.2 1.2 dB AGC 1 min 0.3 1.3 2.3 dB 1.7 2.7 3.7 dB 3.1 4.1 5.1 dB 4.6 5.6 6.6 dB 6.2 7.2 8.2 dB 7.7 8.7 9.7 dB 9.1 10.1 11.1 dB 22, 41, 42 pin 5 VDC –1.2 –0.2 0.8 dB gain select min –0.6 0.2 1.0 dB 0.4 1.2 2.0 dB 2.1 2.9 3.7 dB 3.7 4.5 5.3 dB 5.4 6.2 7.0 dB 7.1 7.9 8.7 dB 8.8 9.6 10.4 dB 9.7 10.5 11.3 dB HA118144AF Appli- cable Pins 46, 47 33, 29 ...
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... V 2.6 3.8 5.0 dB 0.8 0.9 1.0 V 0.25 0.35 V HA118144AF Appli- cable Pins Pins 21, 22, 41, 42: 28 VDC, Pins 27, 28: Short knee max. 28, 10 Pins 21, 22, 41, 42: 5 VDC, Pins 27, 28: 28, 9 Short knee max Pins 41, 42: 5 VDC Pins 27, 28: Short knee 21, 9 max. 41, 42 pin 5 VDC ...
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... CP pulse SDATA 0.1 µ HA118144AF 31 30 0.1 µ 0.1 µF 0.1 µF SDATA SCK 0.1 µ HA118144AF 31 30 0.1 µF 29 0.1 µ 0.1 µF 0.1 µF 10 µ 0.1 µ – BLK pulse OBP pulse HA118144AF 10 µF 0.1 µ – CC 1000 ...
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... HA118144AF Test Patterns HA118144AF 13 ...
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... Knee SDATA min, AGC No. 0, 20, 40 100 120 127 AGC No .2500/div (V) IN FB1 AGC No (SIA2) .2500/div (V) IN HA118144AF Quiescent output potential, OBP high 3.500 Quiescent output potential, OBP high 3.500 ...
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... Knee point min 1.3 V (black level) .5000 1.500 Gain select No. 8 2.0 2.5 2.75 3 ).2500/div (V) IN FB1 Compression ratio PP 0. .2500/div (V) SIA2 input HA118144AF Quiescent output potential, OBP high 3.500 slope B = slope A = 0.66 Slope A: 1.084 Slope B: 0.715 Knee max Knee min 4.000 15 ...
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... AGC1 + AGC2 combined gain control characteristics Gain select number SOA1 (32) (AGC number 0) Maximum gain control level: 21.3 dB Gain control due to AGC1 (pre-stage) Gain control due to AGC2 (post-stage 100110 120 127 Gain select number HA118144AF ...
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... CDS (correlated double sampling) circuit • Gain select • AGC gain setting • Knee level setting (sensor) SIN CDS SP1 SP2 Figure 1 CDS/AGC IC Function Overview Serial data control functions Gain AGC Knee select Serial interface SCK SDATA HA118144AF SO1, SO2 17 ...
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... Following the inverting amplifier, the signal is supplied to the gain select circuit. SP2 3 AMP 4 5 S/H Figure 2 CDS Circuit HA118144AF Output ...
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... Figure 3 CDS Timing Chart HA118144AF stage), which together realize a variable amplification dB. The application should implement an auto- aliasing function by processing the camera DSPIC iris result in the microprocessor, and using that to control the AGC gain in this IC using serial data transfers. ...
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... HA118144AF Output Gain G2 Inflection point Gain Input Figure 4 Knee Level Characteristics 20 HA118144AF Output Knee off (typ 0.9 V) Knee start (typ 0.25 V) (1.5 V Input ) PP ...
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... Data is acquired on the falling edge of SCK for D1 to D10 prior to the latch timing. SDATA Knee level setting AGC gain Correc- — tion/ knee HA118144AF D8 D9 D10 Gain select — ...
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... Knee off The KNP pin (pin 2) should be held low. This bit can be set to either HA118144AF ...
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... SP2 SP1 Figure 6 CDS Figure 7 Internal Equivalent Circuit for SO1 and SO2 HA118144AF • SO1 and SO2 outputs The figure below shows the equivalent circuit for these outputs. As shown in the figure, the output waveform response speed is increased by using a capacitor coupled push-pull structure ...