MT29F8G08FACWP Micron Technology, MT29F8G08FACWP Datasheet - Page 16

no-image

MT29F8G08FACWP

Manufacturer Part Number
MT29F8G08FACWP
Description
NAND Flash Memory
Manufacturer
Micron Technology
Datasheet
Figure 10:
Table 7:
PDF: 09005aef814b01a2 / Source: 09005aef814b01c7
2_4_8gb_nand_m49a__2.fm - Rev. A 3/06 EN
Cycle
First
Second
Third
Fourth
Fifth
www.DataSheet4U.net
Cache Register
Data Register
4,096 blocks
per device
Array Addressing for MT28F4G16BxC and MT29F8G16FxC (x16)
Array Organization for MT28F4G16BxC and MT29F8G16FxC (x16)
I/O[15:8]
LOW
LOW
LOW
LOW
LOW
Notes: 1. For x16 devices, contact factory.
Notes: 1. If CA10 = “1” then CA[9:5] must be “0.”
2. For the 8Gb MT29F8G16F, the 4Gb array organization shown here applies to each chip
2. Die address boundary: “0” = 0Gb–2Gb devices, “1” = 2Gb–4Gb devices.
3. Block address concatenated with page address = actual page address. CAx = column
4. I/O[15:8] are not used during the addressing sequence and should be driven LOW.
BA15
LOW
LOW
I/O7
CA7
BA7
enable (CE# and CE2#).
address; PAx = page address, BAx = block address.
1,024
1,024
1 Block
BA14
LOW
LOW
I/O6
CA6
BA6
1,056 words
BA13
LOW
LOW
I/O5
CA5
PA5
16
2Gb, 4GB, 8Gb: x8, x16 NAND Flash Memory
32
32
BA12
LOW
LOW
I/O4
CA4
PA4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
64 pages = 1 block
1 page
1 block
1 device = (1K + 32) words x 64 pages
BA11
LOW
LOW
I/O3
CA3
PA3
I/O 15
I/O 0
= (1K + 32) words
= (1K + 32) words x 64 pages
= (64K + 2K) words
= 4,224Mb
x 4,096 blocks
(64K + 2K) words
CA10
BA10
LOW
I/O2
CA2
PA2
©2005 Micron Technology, Inc. All rights reserved.
1
Memory Mapping
BA17
I/O1
CA1
CA9
PA1
BA9
2
BA16
I/O0
CA0
CA8
BA8
PA0

Related parts for MT29F8G08FACWP