MT29F8G08FACWP Micron Technology, MT29F8G08FACWP Datasheet - Page 31

• Manufacturer Part Number: MT29F8G08FACWP
• Description: NAND Flash Memory
• Manufacturer: Micron Technology

Internal Data Move
READ FOR INTERNAL DATA MOVE 00h-35h
PROGRAM for INTERNAL DATA MOVE 85h-10h
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2_4_8gb_nand_m49a__2.fm - Rev. A 3/06 EN
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An internal data move requires two command sequences. Issue a READ for INTERNAL
DATA MOVE (00h-35h) command first, then the PROGRAM for INTERNAL DATA MOVE
(85h-10h) command. Data moves are only supported within the die from which data is
read.
The READ for INTERNAL DATA MOVE (00h-35h)command is used in conjunction with
the PROGRAM for INTERNAL DATA MOVE (85h-10h) command. First (00h) is written to
the command register, then the internal source address is written (five cycles). After the
address is input, the READ for INTERNAL DATA MOVE (35h) command writes to the
command register. This transfers a page from memory into the cache register.
The written column addresses are ignored even though all five ADDRESS cycles are
required.
The memory device is now ready to accept the PROGRAM for INTERNAL DATA MOVE
command. Refer to the command description in the following section for details.
After the READ for INTERNAL DATA MOVE (00h-35h) command has been issued and
R/B# goes HIGH, the PROGRAM for INTERNAL DATA MOVE (85h-10h) command can
be written to the command register. This command transfers the data from the cache register
to the data register and programming of the new destination page begins. The sequence:
85h, destination address (five cycles), then 10h, is written to the device. After 10h is writ-
ten, R/B# goes LOW while the control logic automatically programs the new page. The
READ STATUS command can be used instead of the R/B# line to determine when the
write is complete. When status register bit 6 = “1,” bit 0 indicates if the operation was
successful.
The RANDOM DATA INPUT (85h) command can be used during the PROGRAM for
INTERNAL DATA MOVE command sequence to modify a word or multiple words of the
original data. First, data is copied into the cache register using the 00h-35h command
sequence, then the RANDOM DATA INPUT (85h) command is written along with the
address of the data to be modified next. New data is input on the external data pins. This
copies the new data into the cache register.
When 10h is written to the command register, the original data plus the modified data
are transferred to the data register, and programming of the new page is started. The
RANDOM DATA INPUT command can be issued as many times as necessary before
starting the programming sequence with 10h (see Figures 25 and 26 on page 32).
Because INTERNAL DATA MOVE operations do not use external memory, ECC cannot
be used to check for errors before programming the data to a new page. This can lead to
a data error if the source page contains a bit error due to charge loss or charge gain. In
the case that multiple INTERNAL DATA MOVE operations are performed, these bit
errors may accumulate without correction. For this reason, it is highly recommended
that systems using INTERNAL DATA MOVE operations also use a robust ECC scheme
that can correct two or more bits per sector.
31
2Gb, 4GB, 8Gb: x8, x16 NAND Flash Memory
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Command Definitions
©2005 Micron Technology, Inc. All rights reserved.