MT8885 Mitel Networks Corporation, MT8885 Datasheet
MT8885
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MT8885 Summary of contents
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... Credit card systems • Paging systems • Repeater systems/mobile radio • Interconnect dialers • Personal computers Description The MT8885 is a monolithic DTMF transceiver with call progress filter fabricated in CMOS technology offering low power consumption and high reliability. D/A TONE Converters Tone Burst Control Gating Cct ...
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... MT8885 IN VDD 2 23 IN- St/ ESt VRef 5 20 VSS D2 19 OSC1 OSC2 PWDN TONE 15 10 IRQ/CP R/W/ DS/ RS0 24 PIN DIP/SSOP Pin Description Pin # Name IN+ Non-inverting op-amp input IN- Inverting op-amp input. ...
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... DATA pins are held in a high impedance state. Finally, the whole device is put in a power down state when the PWDN pin is asserted. Input Configuration The input arrangement of the MT8885 provides a differential-input operational amplifier as well as a bias source (V ), which is used to bias the inputs at ...
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... V DD MT8885 determine the V St/GT ESt Guard Time Adjustment The simple steering circuit shown in Figure 5 is adequate for most applications. Component values are chosen according to the following inequalities ...
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... TSt shown in Figure 6. The receiver timing is shown in Figure 7 with a description of the events in Figure 9. Call Progress Filter A call progress mode, using the MT8885, can be selected allowing the detection of various tones, which identify the progress of a telephone call on the network. input are common, however, call progress tones can only be detected when CP mode has been selected ...
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... Frequencies which are in the ‘reject’ area will not be detected and consequently the IRQ/CP pin will remain low. DTMF Generator The DTMF transmitter employed in the MT8885 is capable of generating all sixteen standard DTMF tone pairs with low distortion and high accuracy. All frequencies are derived from an external 3.579545 MHz crystal ...
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... A single tone mode is available whereby individual tones from the low group or high group can be limiting filter is generated. This mode can be used for DTMF test equipment generation and distortion measurements. Refer to Control Register B description for details. the particular MT8885 applications, acknowledgment tone 4-57 ...
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... H4 Table 2. Actual Frequencies Versus Standard Requirements Distortion Calculations The MT8885 is capable of producing precise tone bursts with minimal error in frequency (see Table 2). The internal summing amplifier is followed by a first- order lowpass switched capacitor filter to minimize harmonic components and intermodulation products. The total harmonic distortion for a single tone can be ...
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... Q E D0-D3 R/W Figure 12 a) & MT8885 Interface Connections for Various Intel and Motorola Micros The adaptive micro interface provides access to five internal registers. The read-only Receive Data Register contains the decoded output of the last valid DTMF digit received. Data entered into the ...
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... MT8885 Motorola Intel RS0 R Write to Transmit Data Register Read from Receive Data Register Write to Control Register Read from Status Register Table 3. Internal Register Functions RSEL IRQ CP/DTMF Table 4. CRA Bit Positions ...
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... Valid data is in the Receive Data Register. Set upon the valid detection of the absence of a DTMF signal. . Table 8 Status Register Description MT8885 STATUS FLAG CLEARED Interrupt is inactive. Cleared after Status Register is read. Cleared after Status Register is read or when in non-burst mode. Cleared after Status Register is read ...
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... DS/RD R/W/WR RS0 CS * Microprocessor based systems can inject undesirable noise into the supply rails. The performance of the MT8885 can be optimized by keeping noise on the supply rails to a minimum. The decoupling capacitor (C3) should be connected close to the device and ground loops should be avoided. Advance Information V DD ...
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... RS0 R Figure 14 - Application Notes MT8885 Data ...
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... MT8885 Absolute Maximum Ratings Parameter 1 Power supply voltage Voltage on any pin 3 Current at any pin (Except Storage temperature 5 Package power dissipation * Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied. Recommended Operating Conditions - Parameter ...
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... Allowable capacitive load (GS) 10 Allowable resistive load (GS) 11 Common mode range ‡ Typical figures are at 25°C and for design aid only: not guaranteed and not subject to production testing. MT8885 AC Electrical Characteristics Characteristics Valid input signal levels R 1 (each tone of composite ...
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... MT8885 AC Electrical Characteristics Characteristics 1 Accept Bandwidth 2 Lower freq. (REJECT) 3 Upper freq. (REJECT) 4 Call progress tone detect level (total power) † Characteristics are over recommended operating conditions unless otherwise stated ‡ Typical figures are at 25°C, V =5V, and for design aid only: not guaranteed and not subject to production testing ...
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... DHW CSS t 40 CSH OUT t CYC Figure 15 - DS/RD/WR Clock Pulse MT8885 ), unless otherwise stated. SS Max Units Conditions MHz Figure 15 ns Figure 15 ns Figure 15 ns Figure Figure 15 ns Figures 16 & Figures 16 & Figures ...
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... MT8885 DS Q clk* A0-A15 (RS0) R/W(read) Read Data (D3-D0) R/W (write) Write data (D3-D0 Q).Addr [MC6809 VMA.Addr [MC6800, MC6802] *microprocessor pin Figure 16 - MC6800/MC6802/MC6809 Timing Diagram t is from data to DS falling edge; t DSW CSH DS R/W Read AD3-AD0 (RS0, D0-D3) Write AD3-AD0 (RS0-D0-D3) Addr * non-mux AS.Addr ...
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... AS P0* A0-A7 (RS0, D0-D3 (Addr ALE.Addr * microprocessor pins Figure 18 - 8031/8051/8085 Read Timing Diagram ALE P0* (RS0, D0-D3 (Addr ALE.Addr * microprocessor pins Figure 19 - 8031/8051/8085 Write Timing Diagram t CSS t t DDR AH A8-A15 Address t CSH t CSS t DSW t AH A0-A7 Data A8-A15 Address t CSH MT8885 t DHR Data t DHW 4-69 ...
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... MT8885 NOTES: 4-70 Advance Information ...