STB01010 IBM, STB01010 Datasheet

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STB01010

Manufacturer Part Number
STB01010
Description
(STB01000 / STB01010) Digital Set-Top Box Integrated Controller
Manufacturer
IBM
Datasheet
Ver 1.2, 06Apr99
Digital Set-Top Box Product Overview
STB01000 and STB01010
Digital Set-Top Box Integrated Controller
Product Overview
Version 1.2
4/06/99
i

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STB01010 Summary of contents

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... Ver 1.2, 06Apr99 Digital Set-Top Box Integrated Controller Digital Set-Top Box Product Overview STB01000 and STB01010 Product Overview Version 1.2 4/06/99 i ...

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... IBM intends to announce such IBM products, programming, or services in your country. Any reference to an IBM licensed program in this publication is not intended to state or imply that you can use only IBM’s licensed program. You can use any functionally equivalent program instead. ...

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... Ver 1.2, 06Apr99 Patents and Trademarks IBM may have patents or pending patent applications covering the subject matter in this publication. The furnishing of this publication does not give you any license to these patents. You can send license inquiries, in writing, to: IBM Director of Licensing IBM Corporation ...

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Digital Set-Top Box Product Overview iv This page intentionally left blank Ver 1.2, 06Apr99 ...

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... Digital Set-Top Box Integrated Controller Table of Contents Chapter 1. Introduction .................................................................................................... 1 1.1 STB Integrated Controller Overview .............................................................................. 1 1.2 IBM STB Architecture Design Attributes ........................................................................ 1 1.3 Features ......................................................................................................................... 1 1.4 Specifications................................................................................................................. 2 1.5 Description ..................................................................................................................... 2 Chapter 2. Processor Subsystem .................................................................................... 1 2.1 PowerPC 401D2 CPU.................................................................................................... 1 2.1.1 Overview .............................................................................................................. 1 2.1.2 Features ............................................................................................................... 1 2.2 PPC401D2 Code Decompression ................................................................................. 2 2.2.1 Overview .............................................................................................................. 2 2.2.2 Features ............................................................................................................... 2 2.3 Universal Interrupt Controller ......................................................................................... 2 2.3.1 Overview .............................................................................................................. 2 2.3.2 Features ............................................................................................................... 3 2.4 On-Chip Memory ........................................................................................................... 3 2 ...

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Ver 1.2, 06Apr99 4.5.2 Features ............................................................................................................... 7 4.6 Additional Interfaces ....................................................................................................... 7 4.6.1 External Graphics and Video (EGV) Port ............................................................. 7 Chapter 5. Peripheral Subsystem .................................................................................... 1 5.1 General Purpose Timer .................................................................................................. 1 5.1.1 Overview............................................................................................................... 1 5.1.2 Inter-Character (IC) Timers................................................................................... ...

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... STB Integrated Controller Overview The IBM STB01000 and STB01010 Digital Set-Top Box Integrated Controllers (STB010x0) are single- chip Application Specific Standard Products (ASSPs). The STB01000 offers standard digital (MPEG, PCM, LPCM) audio support, while the STB01010 provides Dolby products are PowerPC 401 D2-based. This highly integrated silicon system has been specifically developed for digital STB applications using industry-leading IBM CMOS 5SE (0 ...

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... On-Chip Memory (CCM) The MPEG-2 Digital Audio/Video subsystem includes: • MPEG-2 Video Decoder • MPEG-2 Audio Decoder 1 • Dolby Digital Audio Support • MPEG-2 Transport/DVB Descrambler 1. Dolby Digital support available only on STB01010, Dolby Digital license required. 1-2 Ver 1.2, 06Apr99 STB Integrated Controller Overview ...

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Ver 1.2, 06Apr99 • NTSC/PAL DENC with Macrovision The memory subsystem includes: • DMA Controller • Cross-Bar Switch • External Bus Interface Unit (EBIU) for EDO DRAM, SRAM, and Flash interface • SDRAM Controller (SDRAMC) (also known as High Speed ...

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Digital Set-Top Box Integrated Controller 1-4 This page intentionally left blank STB Integrated Controller Overview Ver 1.2, 06Apr99 ...

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Ver 1.2, 06Apr99 Chapter 2. Processor Subsystem The PowerPC 401D2 (PPC401D2) subsystem handles all system initialization and control, as well as provides power and flexibility for product differentiation. PPC401D2 Core Interrupt Controller Interface UIC Timers: PIT, FIT, 64-bit base Interrupts ...

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Digital Set-Top Box Integrated Controller • Multiply and divide instructions are performed in hardware, and are not emulated in software • Branch prediction execution for most instructions • 52 MIPS total bandwidth, with 45 available MIPS for OS and applications ...

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... Backtrace capability allows the user to specify the number of cycles before the trigger event has occurred. Number of cycles to trace backward is set in the debug tool (IBM RISCWatch Debug tool) • Number of cycles that the trace window specified by sum of forward and backward trace cycles must not exceed the maximum size of trace, which is 64 Kcycles in RISCWatch 2 ...

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Digital Set-Top Box Integrated Controller 2.7 Clock and Power Management 2.7.1 Overview For power-saving purposes, there is a Clock and Power Management (CPM) input , which is used to shut down each unit’s clocks. One cycle after being activated, the ...

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Ver 1.2, 06Apr99 Chapter 3. Memory I/F Subsystem The memory interface subsystem provides the system memory controller interface for the DRAM, SRAM, FLASH Memory, ROM, as well as the SDRAMC (also known as the High Speed Memory Controller [HSMC]) interface ...

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Digital Set-Top Box Integrated Controller – 2 external DMA channels – 10 internal STB010x0 DMA channels that are used by features such as the 1284, Smart Card, SICC, and 16550 UART • Chained operation for back-to-back DMA on the same ...

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Ver 1.2, 06Apr99 • PLB bus interface - supports the processor local bus specifications: – Support for 4 masters on PLB_B0 (data bus 0) and 2 masters on PLB_B1 (data bus 1); – Supports all applicable PLB transfer types including ...

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Digital Set-Top Box Integrated Controller 3.4 Cross-Bar Switch (CBS) 3.4.1 Overview The Unified Memory Architecture (UMA) is implemented via the PowerPC Local Bus (PLB) Cross-Bar Switch (CBS), which connects multiple PLB master buses (PLB_B0 and PLB_B1) to multiple PLB slave ...

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Ver 1.2, 06Apr99 – Any external DMA request/acknowledge/end of transfer/transfer complete signal set can be connected to any DMA channel – Asynchronous – Choice of edge or level sensitive triggering is programmable • Select SRAM Mode Control Controls selection between ...

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Digital Set-Top Box Integrated Controller This Page intentionally left blank Ver 1.2, 06Apr99 Memory I/F Subsystem ...

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Ver 1.2, 06Apr99 Chapter 4. Digital Audio / Video / Transport Subsystem The MPEG-2 Digital Audio/Video subsystem provides fully-synchronized playback of digital streams carrying video and audio programs, with a minimum of interaction required from the processor Digital Audio/Video Subsystem ...

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Digital Set-Top Box Integrated Controller • Handling of user data and other selected bit fields of the PES layer available through memory access from the PPC401D2. • Input from transport or directly from system memory. • Horizontal and vertical filters ...

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Ver 1.2, 06Apr99 – Programmable Background Color. The background color can be defined by the user via a 16-bit YUV value. – Multi-region link list graphic and image plane OSD with a color table for each region. – There can ...

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... LPCM and PCM audio playback output. It can generate up to six channels of audio output for Dolby Digital. The Dolby Digital audio capability is optionally available number, STB01010. A Dolby Digital license must be in effect between the STB01010 purchaser and Dolby Laboratories, Inc. Additional per-chip royalities may be required and are to be paid by the purchaser to Dolby Laboratories, Inc ...

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Ver 1.2, 06Apr99 Dolby Laboratories Licensing Corporation 4.3.2 Features • Provides two channel MPEG audio output; six channel Dolby Digital down mixed to two channels or six channels Dolby Digital output. • Decodes Dolby Digital 5.1 channels and supports Dolby ...

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Digital Set-Top Box Integrated Controller – Left-justified. • Performs audio bitstream error concealment, either by frame repeats or muting, due to loss of synchronization or detection of CRC errors. • MPEG error checking using framesize calculation for each frame. • ...

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... The Multi-standard Digital Video Encoder (DENC) converts digital video data into an analog NTSC or PAL TM signal. Macrovision copy protection is supported in the STB01000 / STB01010 products. A valid Macro- vision license must be in effect between the STB010x0 purchaser and Macrovision Corporation. Additional per-chip royalties may be required and are to be paid by the purchaser to Macrovision Corporation ...

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Digital Set-Top Box Integrated Controller This page intentionally left blank Digital Audio / Video / Transport Subsystem Ver 1.2, 06Apr99 ...

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... Up to three compare timers with unique outputs • Separately configurable and programmable synchronization and output levels • Two reset inputs; one for the entire GPT unit; one just for the time base Peripheral Subsystem Digital Set-Top Box Integrated Controller IBM STB010x0 ...

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Digital Set-Top Box Integrated Controller 5.2 Pulse Width Modulation 5.2.1 Overview The Pulse Width Modulation (PWM) function produces two square wave outputs with a variable duty cycle under program control. The duty cycle varies from 100 percent to 0 percent ...

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Ver 1.2, 06Apr99 unique IIC units are used to provide two independent IIC interfaces. The IIC can be programmed to operate as a master slave both a master and a slave on the IIC interface. The ...

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Digital Set-Top Box Integrated Controller 5.6 Serial Communication Controller 5.6.1 Overview The Serial Communication Controller (SCC universal asynchronous receiver/transmitter (UART) with FIFOs, and is compatible with the 16550 part numbers manufactured by National Semiconductor (NS) Corporation. 5.6.2 Features ...

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Ver 1.2, 06Apr99 offers a 4 bytes FIFO which can be programmed via byte, halfword or word instructions. This FIFO is available for normal UART operation and Ir operation. 5.7.2 Features • Supports RS-232 and infrared communications • Automatic insertion/removal ...

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Digital Set-Top Box Integrated Controller 5.9 Serial Control Port 5.9.1 Overview The SCP is a full-duplex, synchronous, character-oriented (byte) port that allows the exchange of data with other SCP bus-compatible serial devices. The SCP is a slave device to the ...

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