MC14013 ON Semiconductor, MC14013 Datasheet

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MC14013

Manufacturer Part Number
MC14013
Description
Dual Type D Flip-Flop
Manufacturer
ON Semiconductor
Datasheet

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MC14013B
Dual Type D Flip-Flop
P–channel and N–channel enhancement mode devices in a single
monolithic structure. Each flip–flop has independent Data, (D), Direct
Set, (S), Direct Reset, (R), and Clock (C) inputs and complementary
outputs (Q and Q). These devices may be used as shift register
elements or as type T flip–flops for counter and toggle applications.
2. Maximum Ratings are those values beyond which damage to the device
3. Temperature Derating:
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V
to the range V
either V
MAXIMUM RATINGS
March, 2000 – Rev. 3
Symbol
V
The MC14013B dual type D flip–flop is constructed with MOS
I
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
Logic state is retained indefinitely with clock level either high or low;
information is transferred to the output only on the positive–going
edge of the clock pulse
Schottky TTL Load Over the Rated Temperature Range
Static Operation
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Logic Edge–Clocked Flip–Flop Design
Capable of Driving Two Low–power TTL Loads or One Low–power
Pin–for–Pin Replacement for CD4013B
in
in
Semiconductor Components Industries, LLC, 2000
may occur.
Plastic “P and D/DW” Packages: – 7.0 mW/ _ C From 65 _ C To 125 _ C
V
T
P
, V
, I
T
T
stg
DD
D
A
L
out
out
SS
or V
DC Supply Voltage Range
Input or Output Voltage Range
Input or Output Current
Power Dissipation,
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
SS
DD
(DC or Transient)
(DC or Transient) per Pin
per Package (Note 3.)
(8–Second Soldering)
v
). Unused outputs must be left open.
(V
in
Parameter
or V
(Voltages Referenced to V
out
)
v
V
DD
.
in
and V
– 0.5 to V
– 0.5 to +18.0
SS
– 55 to +125
– 65 to +150
out
) (Note 2.)
Value
500
260
should be constrained
10
DD
+ 0.5
1
Unit
mW
mA
V
V
C
C
C
1. For ordering information on the EIAJ version of
MC14013BCP
MC14013BD
MC14013BDR2
MC14013BDT
MC14013BDTR2
MC14013BF
MC14013BFEL
the SOIC packages, please contact your local
ON Semiconductor representative.
Device
A
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
http://onsemi.com
CASE 948G
CASE 751A
SOEIAJ–14
DT SUFFIX
TSSOP–14
= Assembly Location
CASE 646
CASE 965
D SUFFIX
P SUFFIX
F SUFFIX
SOIC–14
PDIP–14
SOEIAJ–14
SOEIAJ–14
TSSOP–14
TSSOP–14 2500/Tape & Reel
Package
SOIC–14
SOIC–14
PDIP–14
Publication Order Number:
14
2500/Tape & Reel
14
14
1
1
1
DIAGRAMS
MC14013BCP
MARKING
See Note 1.
See Note 1.
14
MC14013B
AWLYYWW
AWLYWW
AWLYWW
1
Shipping
2000/Box
MC14013B/D
14013B
55/Rail
96/Rail
ALYW
013B
14

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MC14013 Summary of contents

Page 1

... MC14013B Dual Type D Flip-Flop The MC14013B dual type D flip–flop is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each flip–flop has independent Data, (D), Direct Set, (S), Direct Reset, (R), and Clock (C) inputs and complementary outputs (Q and Q). These devices may be used as shift register elements or as type T flip– ...

Page 2

... MC14013B TRUTH TABLE Inputs † Clock Data Reset Set Don’t Care † = Level Change PIN ASSIGNMENT ...

Page 3

... I (50 pF – 50) Vfk where (per package pF MC14013B (Voltages Referenced Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î – Î Î Î ...

Page 4

... Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. 9. Data must be valid for 250 ns with supply, 100 ns with 10 V, and 70 ns with MC14013B = pF Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 5

... Figure 1. Dynamic Signal Waveforms (Data, Clock, and Output CLOCK BINARY RIPPLE UP–COUNTER (Divide–by– CLOCK C T FLIP–FLOP MODIFIED RING COUNTER (Divide–by–(n+1 CLOCK MC14013B 90 SET RESET CLOCK t ...

Page 6

... K D SEATING 14 PL PLANE 0.25 (0.010 MC14013B PACKAGE DIMENSIONS P SUFFIX PLASTIC DIP PACKAGE CASE 646–06 ISSUE M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN B 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. ...

Page 7

... SEATING G D PLANE PLASTIC EIAJ SOIC PACKAGE VIEW 0.13 (0.005) M 0.10 (0.004) MC14013B PACKAGE DIMENSIONS DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948G–01 ISSUE 0.25 (0.010 –U– F DETAIL Ç Ç Ç ...

Page 8

... Email: ONlit–asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–8549 Phone: 81–3–5740–2745 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 MC14013B/D ...

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