MC145151 Motorola, MC145151 Datasheet - Page 27

• Manufacturer Part Number: MC145151
• Description: Parallel-Input PLL Frequency Synthesizer
• Manufacturer: Motorola

NOTE: Usually, the PLL’s propagation delay from f in to MC plus the setup time of the prescaler determines the upper frequency limit of the system.
MOTOROLA
FREQUENCY CHARACTERISTICS
Symbol
Symbol
f i
The upper frequency limit is found with the following formula: f = P / (t P + t set ) where f is the upper frequency in Hz, P is the lower of the dual
modulus prescaler ratios, t P is the f in to MC propagation delay in seconds, and t set is the prescaler setup time in seconds.
For example, with a 5 V supply, the f in to MC delay is 70 ns. If the MC12028A prescaler is used, the setup time is 16 ns. Thus, if the 64/65
ratio is utilized, the upper frequency limit is f = P / (t P + t set ) = 64/(70 + 16) = 744 MHz.
REFERENCE
V H = High Voltage Level.
V L = Low Voltage Level.
* At this point, when both f R and f V are in phase, the output is forced to near mid–supply.
NOTE: The PD out generates error pulses during out–of–lock conditions. When locked in phase and frequency the output is high
FEEDBACK
OSC R
(f in N)
Input Frequency
(f in , OSC in )
PD out
and the voltage at this pin is determined by the low–pass filter capacitor.
LD
f R
f V
R
V
Parameter
Parameter
Figure 9. Phase Detector/Lock Detector Output Waveforms
(Voltages References to V SS , C L = 50 pF, Input t r = t f =10 ns unless otherwise indicated)
R
V in = 500 mV p–p
ac coupled sine wave
R
V in = 1 V p–p ac coupled
sine wave
R
V in = V DD to V SS
dc coupled square wave
8, A
8, A
8, A
Test Condition
Test Condition
0, N
0, N
0, N
8
8
8
V DD
V DD
V
V
3
5
9
3
5
9
3
5
9
Min
—
—
—
—
—
—
—
—
—
– 40 C
Max
15
15
12
22
25
13
25
25
6
MC145151–2 through MC145158–2
Min
—
—
—
—
—
—
—
—
—
*
25 C
Max
15
15
12
20
22
12
22
25
6
Min
—
—
—
—
—
—
—
—
—
V H
V L
V H
V L
V H
HIGH IMPEDANCE
V L
V H
V L
V H
V L
V H
V L
85 C
Max
15
15
20
22
22
25
6
7
8
MHz
MHz
MHz
Unit
Unit
27