MC145151 Motorola, MC145151 Datasheet - Page 30

• Manufacturer Part Number: MC145151
• Description: Parallel-Input PLL Frequency Synthesizer
• Manufacturer: Motorola

Method of Measurement”, Proc. IEEE, Vol. 57, No. 2 Feb.,
1969.
Control”, Electro–Technology , June, 1969.
Design , May, 1966.
OVERVIEW
lished as a method of achieving high performance frequency
synthesizer operation at high frequencies. Basically, the
approach allows relatively low–frequency programmable
counters to be used as high–frequency programmable
counters with speed capability of several hundred MHz. This
is possible without the sacrifice in system resolution and per-
formance that results if a fixed (single–modulus) divider is
used for the prescaler.
must be uniquely configured. Special control logic is neces-
sary to select the divide value P or P + 1 in the prescaler for
the required amount of time (see modulus control definition).
Motorola’s dual–modulus frequency synthesizers contain
this feature and can be used with a variety of dual–modulus
prescalers to allow speed, complexity and cost to be tailored
to the system requirements. Prescalers having P, P + 1 di-
vide values in the range of
trolled by most Motorola frequency synthesizers.
use with the MC145152–2, MC145156–2, or MC145158–2
are:
DESIGN GUIDELINES
the application:
MC145151–2 through MC145158–2
30
MC12009
MC12011
MC12013
MC12015
MC12016
MC12017
MC12018
MC12022A
MC12032A
Technical Note TN–24, Statek Corp.
Technical Note TN–7, Statek Corp.
E. Hafner, “The Piezoelectric Crystal Unit – Definitions and
D. Kemper, L. Rosine, “Quartz Crystals for Frequency
P. J. Ottowitz, “A Guide to Crystal Selection”, Electronic
The technique of dual–modulus prescaling is well estab-
In dual–modulus prescaling, the lower speed counters
Several dual–modulus prescaler approaches suitable for
The system total divide value, N total (N T ) will be dictated by
N T =
frequency into the phase detector
DUAL–MODULUS PRESCALING
frequency into the prescaler
RECOMMENDED READING
NOTE: Motorola cannot recommend one supplier over another and in no way suggests that this is a complete
United States Crystal Corp.
Crystek Crystal
Statek Corp.
64/65 or
64/65 or
listing of crystal manufacturers.
128/ 129
32/ 33
40/ 41
64/ 65
10/ 11
5/ 6
8/ 9
Name
3/ 4 to 128/ 129 can be con-
128/129
128/129
Table 1. Partial List of Crystal Manufacturers
= N
440 MHz
500 MHz
500 MHz
225 MHz
225 MHz
225 MHz
520 MHz
3605 McCart Ave., Ft. Worth, TX 76110
2351 Crystal Dr., Ft. Myers, FL 33907
512 N. Main St., Orange, CA 92668
1.1 GHz
2.0 GHz

P + A
Address
number programmed into the
the two selectable divide ratios available in the dual–modu-
lus prescalers. To have a range of N T values in sequence,
the A counter is programmed from zero through P – 1 for a
particular value N in the N counter. N is then incremented to
N + 1 and the
achieved for N T . These values are a function of P and the
size of the
N min P – 1. Then N Tmin = (P – 1) P + A or (P – 1) P since A
is free to assume the value of 0.
lus prescaler output must go from low to high after each
group of P or P + 1 input cycles. The prescaler should divide
by P when its modulus control line is high and by P + 1 when
its MC is low.
the value used for P must be large enough such that:
code can be achieved by choosing the values for P of 8, 16,
32, or 64. For these cases, the desired value of N T results
when N T in binary is used as the program code to the N and
are achievable (shown in Figure 13).
A counters treated in the following manner:
N is the number programmed into the N counter, A is the
There are minimum and maximum values that can be
The constraint N A always applies. If A max = P – 1, then
To maximize system frequency capability, the dual–modu-
For the maximum frequency into the prescaler (f VCOmax ),
1. f VCOmax divided by P may not exceed the frequency
2. The period of f VCO divided by P must be greater than
A sometimes useful simplification in the programming
1. Assume the
2. Always program all higher order
3. Assume the N counter and the A counter (with all the
By using the two devices, several dual–modulus values
capability of f in (input to the
the sum of the times:
a. Propagation delay through the dual–modulus pre-
b. Prescaler setup or release time relative to its MC
c. Propagation time from f in to the MC output for the
“a” to 0.
higher order bits above “a” ignored) combined into a
single binary counter of n + a bits in length (n = number
of divider stages in the N counter). The MSB of this “hy-
pothetical” counter is to correspond to the MSB of N and
the LSB is to correspond to the LSB of
divide value, N T , now results when the value of N T in
binary is used to program the “new” n + a bit counter.
scaler.
signal.
frequency synthesizer device.
N and
A is sequenced from 0 through P – 1 again.
N Tmax = N max
A counter contains “a” bits where 2 a
A counters.
(817) 921–3013
(813) 936–2109
(714) 639–7810
Phone
A counter, P and P + 1 are

P + A max
N and
A counter bits above
A counters).
A. The system
MOTOROLA
P.